Commit afefc102 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Ulf Hansson

mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80

Now the the HS-DDR mode clock timings have been corrected, we can
re-enable these modes on the A80.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 0175249e
......@@ -1129,11 +1129,6 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
/* TODO MMC DDR is not working on A80 */
if (of_device_is_compatible(pdev->dev.of_node,
"allwinner,sun9i-a80-mmc"))
mmc->caps &= ~MMC_CAP_1_8V_DDR;
ret = mmc_of_parse(mmc);
if (ret)
goto error_free_dma;
......
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