Commit af6521ea authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
Browse files

[POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCs



1. UCC1's RX_DV pin is 16, not 15;
2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent
   u-boot also using 0x7.
3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup.
4. tx-clock should be CLK16 (GE125, PB31);
5. phy-connection-type is RGMII-ID;
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 321872dc
......@@ -104,10 +104,10 @@
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
phy0: ethernet-phy@0 {
phy0: ethernet-phy@7 {
interrupt-parent = <&mpic>;
interrupts = <1 1>;
reg = <0>;
reg = <7>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
......@@ -242,7 +242,7 @@
4 1a 2 0 2 0 /* RxD7 */
4 0b 1 0 2 0 /* TX_EN */
4 18 1 0 2 0 /* TX_ER */
4 0f 2 0 2 0 /* RX_DV */
4 10 2 0 2 0 /* RX_DV */
4 1e 2 0 2 0 /* RX_ER */
4 11 2 0 2 0 /* RX_CLK */
4 13 1 0 2 0 /* GTX_CLK */
......@@ -334,10 +334,10 @@
mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <&qe_phy0>;
phy-connection-type = "gmii";
tx-clock = <20>;
pio-handle = <&pio1>;
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
};
ucc@3000 {
......@@ -356,10 +356,10 @@
mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <&qe_phy1>;
phy-connection-type = "gmii";
tx-clock = <20>;
pio-handle = <&pio2>;
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
};
mdio@2120 {
......@@ -371,10 +371,10 @@
/* These are the same PHYs as on
* gianfar's MDIO bus */
qe_phy0: ethernet-phy@00 {
qe_phy0: ethernet-phy@07 {
interrupt-parent = <&mpic>;
interrupts = <1 1>;
reg = <0>;
reg = <7>;
device_type = "ethernet-phy";
};
qe_phy1: ethernet-phy@01 {
......
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