Commit abaf48a0 authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King

[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs

Patch from Catalin Marinas

This patch fixes the V bit setting for the ARM1020x processors. At
reset, this bit is automatically set to the value of the HIVECSINIT
input signal which just happened to be 1 but it is not mandatory.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c28a814f
......@@ -445,14 +445,14 @@ __arm1020_setup:
/*
* R
* .RVI ZFRS BLDP WCAM
* .0.1 1001 ..11 0101 FIXME: why no V bit?
* .011 1001 ..11 0101
*/
.type arm1020_cr1_clear, #object
.type arm1020_cr1_set, #object
arm1020_cr1_clear:
.word 0x593f
arm1020_cr1_set:
.word 0x1935
.word 0x3935
__INITDATA
......
......@@ -427,14 +427,14 @@ __arm1020e_setup:
/*
* R
* .RVI ZFRS BLDP WCAM
* .0.1 1001 ..11 0101 /* FIXME: why no V bit? */
* .011 1001 ..11 0101
*/
.type arm1020e_cr1_clear, #object
.type arm1020e_cr1_set, #object
arm1020e_cr1_clear:
.word 0x5f3f
arm1020e_cr1_set:
.word 0x1935
.word 0x3935
__INITDATA
......
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