diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index bbf5fe3db3c87e4649e18c7e39418ac8a6d060a3..d12338f8679803f6488ecf250ad2d72558072fc7 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -11509,6 +11509,22 @@ static void __devinit tg3_read_bc_ver(struct tg3 *tp)
 	}
 }
 
+static void __devinit tg3_read_hwsb_ver(struct tg3 *tp)
+{
+	u32 val, major, minor;
+
+	/* Use native endian representation */
+	if (tg3_nvram_read(tp, TG3_NVM_HWSB_CFG1, &val))
+		return;
+
+	major = (val & TG3_NVM_HWSB_CFG1_MAJMSK) >>
+		TG3_NVM_HWSB_CFG1_MAJSFT;
+	minor = (val & TG3_NVM_HWSB_CFG1_MINMSK) >>
+		TG3_NVM_HWSB_CFG1_MINSFT;
+
+	snprintf(&tp->fw_ver[0], 32, "sb v%d.%02d", major, minor);
+}
+
 static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val)
 {
 	u32 offset, major, minor, build;
@@ -11645,6 +11661,8 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
 		tg3_read_bc_ver(tp);
 	else if ((val & TG3_EEPROM_MAGIC_FW_MSK) == TG3_EEPROM_MAGIC_FW)
 		tg3_read_sb_ver(tp, val);
+	else if ((val & TG3_EEPROM_MAGIC_HW_MSK) == TG3_EEPROM_MAGIC_HW)
+		tg3_read_hwsb_ver(tp);
 	else
 		return;
 
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 2a75a60a6f1fd6b5607bf52369a15a1c956bdff4..cb4c62abdd2142c9295fc170f8463a79c8358d18 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1719,6 +1719,12 @@
 
 #define TG3_OTP_DEFAULT			0x286c1640
 
+/* Hardware Selfboot NVRAM layout */
+#define TG3_NVM_HWSB_CFG1		0x00000004
+#define  TG3_NVM_HWSB_CFG1_MAJMSK	0xf8000000
+#define  TG3_NVM_HWSB_CFG1_MAJSFT	27
+#define  TG3_NVM_HWSB_CFG1_MINMSK	0x07c00000
+#define  TG3_NVM_HWSB_CFG1_MINSFT	22
 
 #define TG3_EEPROM_MAGIC		0x669955aa
 #define TG3_EEPROM_MAGIC_FW		0xa5000000