Commit a081568d authored by Russell King's avatar Russell King Committed by Russell King
Browse files

[ARM] Fix decompressor serial IO to give CRLF not LFCR



As per the corresponding change to the serial drivers, arrange
for ARM decompressors to give CRLF.  Move the common putstr code
into misc.c such that machines only need to supply "putc" and
"flush" functions.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 3747b36e
......@@ -20,24 +20,32 @@ unsigned int __machine_arch_type;
#include <linux/string.h>
#include <asm/arch/uncompress.h>
#ifdef STANDALONE_DEBUG
#define putstr printf
#endif
#else
#ifdef CONFIG_DEBUG_ICEDCC
#define putstr icedcc_putstr
#define putc icedcc_putc
static void putstr(const char *ptr);
#include <linux/compiler.h>
#include <asm/arch/uncompress.h>
#ifdef CONFIG_DEBUG_ICEDCC
extern void icedcc_putc(int ch);
#define putc(ch) icedcc_putc(ch)
#define flush() do { } while (0)
#endif
static void
icedcc_putstr(const char *ptr)
static void putstr(const char *ptr)
{
for (; *ptr != '\0'; ptr++) {
icedcc_putc(*ptr);
char c;
while ((c = *ptr++) != '\0') {
if (c == '\n')
putc('\r');
putc(c);
}
flush();
}
#endif
......
......@@ -15,7 +15,7 @@
#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
static void putstr( const char *s )
static void putc(int c)
{
unsigned long serial_port;
do {
......@@ -28,17 +28,16 @@ static void putstr( const char *s )
return;
} while (0);
for (; *s; s++) {
/* wait for space in the UART's transmitter */
while ((UART(UART_SR) & UART_SR_TxFF));
/* send the character out. */
UART(UART_DR) = *s;
/* if a LF, also do CR... */
if (*s == 10) {
while ((UART(UART_SR) & UART_SR_TxFF));
UART(UART_DR) = 13;
}
}
/* wait for space in the UART's transmitter */
while ((UART(UART_SR) & UART_SR_TxFF))
barrier();
/* send the character out. */
UART(UART_DR) = c;
}
static inline void flush(void)
{
}
#define arch_decomp_setup()
......
......@@ -31,21 +31,22 @@
*
* This does not append a newline
*/
static void putstr(const char *s)
static void putc(int c)
{
void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
barrier();
__raw_writel(c, sys + AT91_DBGU_THR);
}
static inline void flush(void)
{
void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
while (*s) {
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
__raw_writel(*s, sys + AT91_DBGU_THR);
if (*s == '\n') {
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
__raw_writel('\r', sys + AT91_DBGU_THR);
}
s++;
}
/* wait for transmission to complete */
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); }
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
barrier();
}
#define arch_decomp_setup()
......
......@@ -3,27 +3,19 @@
*
* Copyright (C) 1999, 2000 Nexus Electronics Ltd.
*/
#define BASE 0x03010000
#define SERBASE (BASE + (0x2f8 << 2))
static __inline__ void putc(char c)
static inline void putc(char c)
{
while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20));
while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
barrier();
*((volatile unsigned int *)(SERBASE)) = c;
}
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
static __inline__ void arch_decomp_setup(void)
......
......@@ -25,7 +25,6 @@
#undef CLPS7111_BASE
#define CLPS7111_BASE CLPS7111_PHYS_BASE
#define barrier() __asm__ __volatile__("": : :"memory")
#define __raw_readl(p) (*(unsigned long *)(p))
#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
......@@ -40,21 +39,15 @@
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void putc(int c)
{
char c;
while ((c = *s++) != '\0') {
while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
barrier();
clps_writel(c, UARTDRx);
while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
barrier();
clps_writel(c, UARTDRx);
}
if (c == '\n') {
while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
barrier();
clps_writel('\r', UARTDRx);
}
}
static inline void flush(void)
{
while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
barrier();
}
......
......@@ -8,33 +8,34 @@
* published by the Free Software Foundation.
*/
#include <linux/serial_reg.h>
#define SERIAL_BASE ((unsigned char *)0xfe000be0)
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void putc(int c)
{
unsigned char v, *base = SERIAL_BASE;
do {
v = base[UART_LSR << 2];
barrier();
} while (!(v & UART_LSR_THRE));
base[UART_TX << 2] = c;
}
static inline void flush(void)
{
unsigned long tmp1, tmp2;
__asm__ __volatile__(
"ldrb %0, [%2], #1\n"
" teq %0, #0\n"
" beq 3f\n"
"1: strb %0, [%3]\n"
"2: ldrb %1, [%3, #0x14]\n"
" and %1, %1, #0x60\n"
" teq %1, #0x60\n"
" bne 2b\n"
" teq %0, #'\n'\n"
" moveq %0, #'\r'\n"
" beq 1b\n"
" ldrb %0, [%2], #1\n"
" teq %0, #0\n"
" bne 1b\n"
"3: ldrb %1, [%3, #0x14]\n"
" and %1, %1, #0x60\n"
" teq %1, #0x60\n"
" bne 3b"
: "=&r" (tmp1), "=&r" (tmp2)
: "r" (s), "r" (0xf0000be0) : "cc");
unsigned char v, *base = SERIAL_BASE;
do {
v = base[UART_LSR << 2];
barrier();
} while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) !=
(UART_LSR_TEMT|UART_LSR_THRE));
}
/*
......
......@@ -15,10 +15,11 @@
#define DC21285_BASE ((volatile unsigned int *)0x42000160)
#define SER0_BASE ((volatile unsigned char *)0x7c0003f8)
static __inline__ void putc(char c)
static inline void putc(char c)
{
if (machine_is_netwinder()) {
while ((SER0_BASE[5] & 0x60) != 0x60);
while ((SER0_BASE[5] & 0x60) != 0x60)
barrier();
SER0_BASE[0] = c;
} else {
while (DC21285_BASE[6] & 8);
......@@ -26,17 +27,8 @@ static __inline__ void putc(char c)
}
}
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
/*
......
......@@ -36,7 +36,7 @@ static void __raw_writel(unsigned int value, unsigned int ptr)
#define PHYS_UART1_FLAG 0x808c0018
#define UART1_FLAG_TXFF 0x20
static __inline__ void putc(char c)
static inline void putc(int c)
{
int i;
......@@ -49,14 +49,8 @@ static __inline__ void putc(char c)
__raw_writeb(c, PHYS_UART1_DATA);
}
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
......
......@@ -12,22 +12,20 @@
#define LSR 0x14
#define TEMPTY 0x40
static void putstr(const char *s)
static inline void putc(int c)
{
char c;
volatile unsigned char *p = (volatile unsigned char *)(IO_PHYS+0x20000);
while ( (c = *s++) != '\0') {
/* wait until transmit buffer is empty */
while((p[LSR] & TEMPTY) == 0x0);
/* write next character */
*p = c;
if(c == '\n') {
while((p[LSR] & TEMPTY) == 0x0);
*p = '\r';
}
}
/* wait until transmit buffer is empty */
while((p[LSR] & TEMPTY) == 0x0)
barrier();
/* write next character */
*p = c;
}
static inline void flush(void)
{
}
/*
......
......@@ -39,8 +39,7 @@
*
* This does not append a newline
*/
static void
putstr(const char *s)
static void putc(int c)
{
unsigned long serial_port;
......@@ -54,20 +53,14 @@ putstr(const char *s)
return;
} while(0);
while (*s) {
while ( !(UART(USR2) & USR2_TXFE) )
barrier();
while (!(UART(USR2) & USR2_TXFE))
barrier();
UART(TXR) = *s;
if (*s == '\n') {
while ( !(UART(USR2) & USR2_TXFE) )
barrier();
UART(TXR) = c;
}
UART(TXR) = '\r';
}
s++;
}
static inline void flush(void)
{
}
/*
......
......@@ -28,21 +28,18 @@
/*
* This does not append a newline
*/
static void putstr(const char *s)
static void putc(int c)
{
while (*s) {
while (AMBA_UART_FR & (1 << 5));
while (AMBA_UART_FR & (1 << 5))
barrier();
AMBA_UART_DR = *s;
if (*s == '\n') {
while (AMBA_UART_FR & (1 << 5));
AMBA_UART_DR = c;
}
AMBA_UART_DR = '\r';
}
s++;
}
while (AMBA_UART_FR & (1 << 3));
static inline void flush(void)
{
while (AMBA_UART_FR & (1 << 3))
barrier();
}
/*
......
......@@ -19,23 +19,15 @@ static volatile UTYPE uart_base;
#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
static __inline__ void putc(char c)
static inline void putc(char c)
{
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE);
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
*uart_base = c;
}
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
......
......@@ -29,23 +29,18 @@
#define UARTSR PHYS(0x14) /* Status reg */
static __inline__ void putc(char c)
static inline void putc(int c)
{
int j = 0x1000;
while (--j && !(*UARTSR & UART_LSR_THRE));
while (--j && !(*UARTSR & UART_LSR_THRE))
barrier();
*UARTDR = c;
}
static void putstr(const char *s)
static inline void flush(void)
{
while (*s)
{
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
#define arch_decomp_setup()
......
......@@ -21,26 +21,18 @@
static volatile u32* uart_base;
static __inline__ void putc(char c)
static inline void putc(int c)
{
/* Check THRE and TEMT bits before we transmit the character.
*/
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE);
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
*uart_base = c;
}
/*
* This does not append a newline
*/
static void putstr(const char *s)
static void flush(void)
{
while (*s)
{
putc(*s);
if (*s == '\n')
putc('\r');
s++;
}
}
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
......
......@@ -16,22 +16,17 @@
#define __raw_writeb(v,p) (*(volatile unsigned char *)(p) = (v))
#define __raw_readb(p) (*(volatile unsigned char *)(p))
static __inline__ void putc(char c)
static inline void putc(int c)
{
while(__raw_readb(IO_UART + 0x18) & 0x20 ||
__raw_readb(IO_UART + 0x18) & 0x08);
__raw_readb(IO_UART + 0x18) & 0x08)
barrier();
__raw_writeb(c, IO_UART + 0x00);
}
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
if (*s == 10) { /* If a LF, add CR */
putc(10);
putc(13);
}
putc(*(s++));
}
}
static __inline__ void arch_decomp_setup(void)
......
......@@ -22,20 +22,15 @@
#define UART_STATUS (*(volatile unsigned long*) (UART2_PHYS + UART_R_STATUS))
#define UART_DATA (*(volatile unsigned long*) (UART2_PHYS + UART_R_DATA))
static __inline__ void putc (char ch)
static inline void putc(int ch)
{
while (UART_STATUS & nTxRdy)
;
barrier();
UART_DATA = ch;
}
static void putstr (const char* sz)
static inline void flush(void)
{
for (; *sz; ++sz) {
putc (*sz);
if (*sz == '\n')
putc ('\r');
}
}
/* NULL functions; we don't presently need them */
......
......@@ -30,8 +30,7 @@ unsigned int system_rev;
#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
static void
putstr(const char *s)
static void putc(int c)
{
volatile u8 * uart = 0;
int shift = 2;
......@@ -69,16 +68,13 @@ putstr(const char *s)
/*
* Now, xmit each character
*/
while (*s) {
while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
barrier();
uart[UART_TX << shift] = *s;
if (*s++ == '\n') {
while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
barrier();
uart[UART_TX << shift] = '\r';
}
}
while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
barrier();
uart[UART_TX << shift] = c;
}
static inline void flush(void)
{
}
/*
......
......@@ -17,23 +17,18 @@
#define UART FFUART
static __inline__ void putc(char c)
static inline void putc(char c)
{
while (!(UART[5] & 0x20));
while (!(UART[5] & 0x20))
barrier();
UART[0] = c;
}
/*
* This does not append a newline
*/
static void putstr(const char *s)
static inline void flush(void)
{
while (*s) {
putc(*s);
if (*s == '\n')
putc('\r');