Commit 9ef89150 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by paul
Browse files

ARM: OMAP4: PM: Fix the PRM and CM base addresses



This patch fixes the PRM and CM base addresses and adds
a new CM2 base address for OMAP4
Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
parent 0d93d8bb
......@@ -11,6 +11,7 @@ clock-common = clock.o clock_common_data.o clockdomain.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_ARCH_OMAP4) += prcm.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
......
......@@ -34,6 +34,7 @@
static void __iomem *prm_base;
static void __iomem *cm_base;
static void __iomem *cm2_base;
#define MAX_MODULE_ENABLE_WAIT 100000
......@@ -258,6 +259,7 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
{
prm_base = omap2_globals->prm;
cm_base = omap2_globals->cm;
cm2_base = omap2_globals->cm2;
}
#ifdef CONFIG_ARCH_OMAP3
......
......@@ -57,11 +57,6 @@ void omap2_clk_prepare_for_reboot(void)
{
}
EXPORT_SYMBOL(omap2_clk_prepare_for_reboot);
void omap_prcm_arch_reset(char mode)
{
}
EXPORT_SYMBOL(omap_prcm_arch_reset);
#endif
int clk_enable(struct clk *clk)
{
......
......@@ -284,12 +284,14 @@ static struct omap_globals omap4_globals = {
.ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
.prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
.cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
.cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
};
void __init omap2_set_globals_443x(void)
{
omap2_set_globals_tap(&omap4_globals);
omap2_set_globals_control(&omap4_globals);
omap2_set_globals_prcm(&omap4_globals);
}
#endif
......@@ -58,6 +58,7 @@ struct omap_globals {
void __iomem *ctrl; /* System Control Module */
void __iomem *prm; /* Power and Reset Management */
void __iomem *cm; /* Clock Management */
void __iomem *cm2;
};
void omap2_set_globals_242x(void);
......
......@@ -26,8 +26,10 @@
#define OMAP44XX_EMIF2_BASE 0x4d000000
#define OMAP44XX_DMM_BASE 0x4e000000
#define OMAP4430_32KSYNCT_BASE 0x4a304000
#define OMAP4430_CM_BASE 0x4a004000
#define OMAP4430_PRM_BASE 0x48306000
#define OMAP4430_CM1_BASE 0x4a004000
#define OMAP4430_CM_BASE OMAP4430_CM1_BASE
#define OMAP4430_CM2_BASE 0x4a008000
#define OMAP4430_PRM_BASE 0x4a306000
#define OMAP44XX_GPMC_BASE 0x50000000
#define OMAP443X_SCM_BASE 0x4a002000
#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE
......
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