Commit 9ab073bc authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fbdev-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux

Pull fbdev changes from Tomi Valkeinen:
 - Improvements to da8xx-fb to make it support v2 of the LCDC IP, used
   eg in BeagleBone
 - Himax HX8369 controller support
 - Various small fixes and cleanups

* tag 'fbdev-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (42 commits)
  video: da8xx-fb: fix the polarities of the hsync/vsync pulse
  video: da8xx-fb: support lcdc v2 timing register expansion
  video: da8xx-fb: fixing timing off by one errors
  video: da8xx-fb fixing incorrect porch mappings
  video: xilinxfb: replace devm_request_and_ioremap by devm_ioremap_resource
  fbmem: move EXPORT_SYMBOL annotation next to symbol declarations
  drivers: video: fbcmap: remove the redundency and incorrect checkings
  video: mxsfb: simplify use of devm_ioremap_resource
  Release efifb's colormap in efifb_destroy()
  at91/avr32/atmel_lcdfb: prepare clk before calling enable
  video: exynos: Ensure definitions match prototypes
  OMAPDSS: fix WARN_ON in 'alpha_blending_enabled' sysfs file
  OMAPDSS: HDMI: Fix possible NULL reference
  video: da8xx-fb: adding am33xx as dependency
  video: da8xx-fb: let compiler decide what to inline
  video: da8xx-fb: make clock naming consistent
  video: da8xx-fb: set upstream clock rate (if reqd)
  video: da8xx-fb: reorganize panel detection
  video: da8xx-fb: ensure non-null cfg in pdata
  video: da8xx-fb: use devres
  ...
parents eced5a0a 028cd86b
......@@ -12,6 +12,7 @@ Required properties:
- stride: The number of bytes in each line of the framebuffer.
- format: The format of the framebuffer surface. Valid values are:
- r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
- a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r).
Example:
......
......@@ -2100,13 +2100,6 @@ config GPM1040A0_320X240
bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
depends on FB_NUC900
config FB_NUC900_DEBUG
bool "NUC900 lcd debug messages"
depends on FB_NUC900
help
Turn on debugging messages. Note that you can set/unset at run time
through sysfs
config FB_SM501
tristate "Silicon Motion SM501 framebuffer support"
depends on FB && MFD_SM501
......@@ -2228,15 +2221,17 @@ config FB_SH7760
panels <= 320 pixel horizontal resolution.
config FB_DA8XX
tristate "DA8xx/OMAP-L1xx Framebuffer support"
depends on FB && ARCH_DAVINCI_DA8XX
tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support"
depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_CFB_REV_PIXELS_IN_BYTE
select FB_MODE_HELPERS
select VIDEOMODE_HELPERS
---help---
This is the frame buffer device driver for the TI LCD controller
found on DA8xx/OMAP-L1xx SoCs.
found on DA8xx/OMAP-L1xx/AM335x SoCs.
If unsure, say N.
config FB_VIRTUAL
......
......@@ -902,14 +902,14 @@ static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
{
clk_enable(sinfo->bus_clk);
clk_enable(sinfo->lcdc_clk);
clk_prepare_enable(sinfo->bus_clk);
clk_prepare_enable(sinfo->lcdc_clk);
}
static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
{
clk_disable(sinfo->bus_clk);
clk_disable(sinfo->lcdc_clk);
clk_disable_unprepare(sinfo->bus_clk);
clk_disable_unprepare(sinfo->lcdc_clk);
}
......
......@@ -71,11 +71,24 @@
#define HX8357_SET_POWER_NORMAL 0xd2
#define HX8357_SET_PANEL_RELATED 0xe9
#define HX8369_SET_DISPLAY_BRIGHTNESS 0x51
#define HX8369_WRITE_CABC_DISPLAY_VALUE 0x53
#define HX8369_WRITE_CABC_BRIGHT_CTRL 0x55
#define HX8369_WRITE_CABC_MIN_BRIGHTNESS 0x5e
#define HX8369_SET_POWER 0xb1
#define HX8369_SET_DISPLAY_MODE 0xb2
#define HX8369_SET_DISPLAY_WAVEFORM_CYC 0xb4
#define HX8369_SET_VCOM 0xb6
#define HX8369_SET_EXTENSION_COMMAND 0xb9
#define HX8369_SET_GIP 0xd5
#define HX8369_SET_GAMMA_CURVE_RELATED 0xe0
struct hx8357_data {
unsigned im_pins[HX8357_NUM_IM_PINS];
unsigned reset;
struct spi_device *spi;
int state;
bool use_im_pins;
};
static u8 hx8357_seq_power[] = {
......@@ -143,6 +156,61 @@ static u8 hx8357_seq_display_mode[] = {
HX8357_SET_DISPLAY_MODE_RGB_INTERFACE,
};
static u8 hx8369_seq_write_CABC_min_brightness[] = {
HX8369_WRITE_CABC_MIN_BRIGHTNESS, 0x00,
};
static u8 hx8369_seq_write_CABC_control[] = {
HX8369_WRITE_CABC_DISPLAY_VALUE, 0x24,
};
static u8 hx8369_seq_set_display_brightness[] = {
HX8369_SET_DISPLAY_BRIGHTNESS, 0xFF,
};
static u8 hx8369_seq_write_CABC_control_setting[] = {
HX8369_WRITE_CABC_BRIGHT_CTRL, 0x02,
};
static u8 hx8369_seq_extension_command[] = {
HX8369_SET_EXTENSION_COMMAND, 0xff, 0x83, 0x69,
};
static u8 hx8369_seq_display_related[] = {
HX8369_SET_DISPLAY_MODE, 0x00, 0x2b, 0x03, 0x03, 0x70, 0x00,
0xff, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x01,
};
static u8 hx8369_seq_panel_waveform_cycle[] = {
HX8369_SET_DISPLAY_WAVEFORM_CYC, 0x0a, 0x1d, 0x80, 0x06, 0x02,
};
static u8 hx8369_seq_set_address_mode[] = {
HX8357_SET_ADDRESS_MODE, 0x00,
};
static u8 hx8369_seq_vcom[] = {
HX8369_SET_VCOM, 0x3e, 0x3e,
};
static u8 hx8369_seq_gip[] = {
HX8369_SET_GIP, 0x00, 0x01, 0x03, 0x25, 0x01, 0x02, 0x28, 0x70,
0x11, 0x13, 0x00, 0x00, 0x40, 0x26, 0x51, 0x37, 0x00, 0x00, 0x71,
0x35, 0x60, 0x24, 0x07, 0x0f, 0x04, 0x04,
};
static u8 hx8369_seq_power[] = {
HX8369_SET_POWER, 0x01, 0x00, 0x34, 0x03, 0x00, 0x11, 0x11, 0x32,
0x2f, 0x3f, 0x3f, 0x01, 0x3a, 0x01, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
};
static u8 hx8369_seq_gamma_curve_related[] = {
HX8369_SET_GAMMA_CURVE_RELATED, 0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d,
0x2e, 0x4a, 0x08, 0x0e, 0x0f, 0x14, 0x16, 0x14, 0x14, 0x14, 0x1e,
0x00, 0x0d, 0x19, 0x2f, 0x3b, 0x3d, 0x2e, 0x4a, 0x08, 0x0e, 0x0f,
0x14, 0x16, 0x14, 0x14, 0x14, 0x1e,
};
static int hx8357_spi_write_then_read(struct lcd_device *lcdev,
u8 *txbuf, u16 txlen,
u8 *rxbuf, u16 rxlen)
......@@ -219,6 +287,10 @@ static int hx8357_enter_standby(struct lcd_device *lcdev)
if (ret < 0)
return ret;
/*
* The controller needs 120ms when entering in sleep mode before we can
* send the command to go off sleep mode
*/
msleep(120);
return 0;
......@@ -232,6 +304,10 @@ static int hx8357_exit_standby(struct lcd_device *lcdev)
if (ret < 0)
return ret;
/*
* The controller needs 120ms when exiting from sleep mode before we
* can send the command to enter in sleep mode
*/
msleep(120);
ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
......@@ -241,18 +317,9 @@ static int hx8357_exit_standby(struct lcd_device *lcdev)
return 0;
}
static int hx8357_lcd_init(struct lcd_device *lcdev)
static void hx8357_lcd_reset(struct lcd_device *lcdev)
{
struct hx8357_data *lcd = lcd_get_data(lcdev);
int ret;
/*
* Set the interface selection pins to SPI mode, with three
* wires
*/
gpio_set_value_cansleep(lcd->im_pins[0], 1);
gpio_set_value_cansleep(lcd->im_pins[1], 0);
gpio_set_value_cansleep(lcd->im_pins[2], 1);
/* Reset the screen */
gpio_set_value(lcd->reset, 1);
......@@ -260,7 +327,25 @@ static int hx8357_lcd_init(struct lcd_device *lcdev)
gpio_set_value(lcd->reset, 0);
usleep_range(10000, 12000);
gpio_set_value(lcd->reset, 1);
/* The controller needs 120ms to recover from reset */
msleep(120);
}
static int hx8357_lcd_init(struct lcd_device *lcdev)
{
struct hx8357_data *lcd = lcd_get_data(lcdev);
int ret;
/*
* Set the interface selection pins to SPI mode, with three
* wires
*/
if (lcd->use_im_pins) {
gpio_set_value_cansleep(lcd->im_pins[0], 1);
gpio_set_value_cansleep(lcd->im_pins[1], 0);
gpio_set_value_cansleep(lcd->im_pins[2], 1);
}
ret = hx8357_spi_write_array(lcdev, hx8357_seq_power,
ARRAY_SIZE(hx8357_seq_power));
......@@ -341,6 +426,9 @@ static int hx8357_lcd_init(struct lcd_device *lcdev)
if (ret < 0)
return ret;
/*
* The controller needs 120ms to fully recover from exiting sleep mode
*/
msleep(120);
ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
......@@ -356,6 +444,96 @@ static int hx8357_lcd_init(struct lcd_device *lcdev)
return 0;
}
static int hx8369_lcd_init(struct lcd_device *lcdev)
{
int ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_extension_command,
ARRAY_SIZE(hx8369_seq_extension_command));
if (ret < 0)
return ret;
usleep_range(10000, 12000);
ret = hx8357_spi_write_array(lcdev, hx8369_seq_display_related,
ARRAY_SIZE(hx8369_seq_display_related));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_panel_waveform_cycle,
ARRAY_SIZE(hx8369_seq_panel_waveform_cycle));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_address_mode,
ARRAY_SIZE(hx8369_seq_set_address_mode));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_vcom,
ARRAY_SIZE(hx8369_seq_vcom));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_gip,
ARRAY_SIZE(hx8369_seq_gip));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev, hx8369_seq_power,
ARRAY_SIZE(hx8369_seq_power));
if (ret < 0)
return ret;
ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
if (ret < 0)
return ret;
/*
* The controller needs 120ms to fully recover from exiting sleep mode
*/
msleep(120);
ret = hx8357_spi_write_array(lcdev, hx8369_seq_gamma_curve_related,
ARRAY_SIZE(hx8369_seq_gamma_curve_related));
if (ret < 0)
return ret;
ret = hx8357_spi_write_byte(lcdev, HX8357_EXIT_SLEEP_MODE);
if (ret < 0)
return ret;
usleep_range(1000, 1200);
ret = hx8357_spi_write_array(lcdev, hx8369_seq_write_CABC_control,
ARRAY_SIZE(hx8369_seq_write_CABC_control));
if (ret < 0)
return ret;
usleep_range(10000, 12000);
ret = hx8357_spi_write_array(lcdev,
hx8369_seq_write_CABC_control_setting,
ARRAY_SIZE(hx8369_seq_write_CABC_control_setting));
if (ret < 0)
return ret;
ret = hx8357_spi_write_array(lcdev,
hx8369_seq_write_CABC_min_brightness,
ARRAY_SIZE(hx8369_seq_write_CABC_min_brightness));
if (ret < 0)
return ret;
usleep_range(10000, 12000);
ret = hx8357_spi_write_array(lcdev, hx8369_seq_set_display_brightness,
ARRAY_SIZE(hx8369_seq_set_display_brightness));
if (ret < 0)
return ret;
ret = hx8357_spi_write_byte(lcdev, HX8357_SET_DISPLAY_ON);
if (ret < 0)
return ret;
return 0;
}
#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
static int hx8357_set_power(struct lcd_device *lcdev, int power)
......@@ -388,10 +566,24 @@ static struct lcd_ops hx8357_ops = {
.get_power = hx8357_get_power,
};
static const struct of_device_id hx8357_dt_ids[] = {
{
.compatible = "himax,hx8357",
.data = hx8357_lcd_init,
},
{
.compatible = "himax,hx8369",
.data = hx8369_lcd_init,
},
{},
};
MODULE_DEVICE_TABLE(of, hx8357_dt_ids);
static int hx8357_probe(struct spi_device *spi)
{
struct lcd_device *lcdev;
struct hx8357_data *lcd;
const struct of_device_id *match;
int i, ret;
lcd = devm_kzalloc(&spi->dev, sizeof(*lcd), GFP_KERNEL);
......@@ -408,6 +600,10 @@ static int hx8357_probe(struct spi_device *spi)
lcd->spi = spi;
match = of_match_device(hx8357_dt_ids, &spi->dev);
if (!match || !match->data)
return -EINVAL;
lcd->reset = of_get_named_gpio(spi->dev.of_node, "gpios-reset", 0);
if (!gpio_is_valid(lcd->reset)) {
dev_err(&spi->dev, "Missing dt property: gpios-reset\n");
......@@ -424,25 +620,32 @@ static int hx8357_probe(struct spi_device *spi)
return -EINVAL;
}
for (i = 0; i < HX8357_NUM_IM_PINS; i++) {
lcd->im_pins[i] = of_get_named_gpio(spi->dev.of_node,
"im-gpios", i);
if (lcd->im_pins[i] == -EPROBE_DEFER) {
dev_info(&spi->dev, "GPIO requested is not here yet, deferring the probe\n");
return -EPROBE_DEFER;
}
if (!gpio_is_valid(lcd->im_pins[i])) {
dev_err(&spi->dev, "Missing dt property: im-gpios\n");
return -EINVAL;
}
ret = devm_gpio_request_one(&spi->dev, lcd->im_pins[i],
GPIOF_OUT_INIT_LOW, "im_pins");
if (ret) {
dev_err(&spi->dev, "failed to request gpio %d: %d\n",
lcd->im_pins[i], ret);
return -EINVAL;
if (of_find_property(spi->dev.of_node, "im-gpios", NULL)) {
lcd->use_im_pins = 1;
for (i = 0; i < HX8357_NUM_IM_PINS; i++) {
lcd->im_pins[i] = of_get_named_gpio(spi->dev.of_node,
"im-gpios", i);
if (lcd->im_pins[i] == -EPROBE_DEFER) {
dev_info(&spi->dev, "GPIO requested is not here yet, deferring the probe\n");
return -EPROBE_DEFER;
}
if (!gpio_is_valid(lcd->im_pins[i])) {
dev_err(&spi->dev, "Missing dt property: im-gpios\n");
return -EINVAL;
}
ret = devm_gpio_request_one(&spi->dev, lcd->im_pins[i],
GPIOF_OUT_INIT_LOW,
"im_pins");
if (ret) {
dev_err(&spi->dev, "failed to request gpio %d: %d\n",
lcd->im_pins[i], ret);
return -EINVAL;
}
}
} else {
lcd->use_im_pins = 0;
}
lcdev = lcd_device_register("mxsfb", &spi->dev, lcd, &hx8357_ops);
......@@ -452,7 +655,9 @@ static int hx8357_probe(struct spi_device *spi)
}
spi_set_drvdata(spi, lcdev);
ret = hx8357_lcd_init(lcdev);
hx8357_lcd_reset(lcdev);
ret = ((int (*)(struct lcd_device *))match->data)(lcdev);
if (ret) {
dev_err(&spi->dev, "Couldn't initialize panel\n");
goto init_error;
......@@ -475,12 +680,6 @@ static int hx8357_remove(struct spi_device *spi)
return 0;
}
static const struct of_device_id hx8357_dt_ids[] = {
{ .compatible = "himax,hx8357" },
{},
};
MODULE_DEVICE_TABLE(of, hx8357_dt_ids);
static struct spi_driver hx8357_driver = {
.probe = hx8357_probe,
.remove = hx8357_remove,
......
......@@ -246,7 +246,7 @@ static int lp855x_bl_update_status(struct backlight_device *bl)
{
struct lp855x *lp = bl_get_data(bl);
if (bl->props.state & BL_CORE_SUSPENDED)
if (bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
bl->props.brightness = 0;
if (lp->mode == PWM_BASED) {
......
......@@ -131,29 +131,28 @@
#define WSI_TIMEOUT 50
#define PALETTE_SIZE 256
#define LEFT_MARGIN 64
#define RIGHT_MARGIN 64
#define UPPER_MARGIN 32
#define LOWER_MARGIN 32
#define CLK_MIN_DIV 2
#define CLK_MAX_DIV 255
static void __iomem *da8xx_fb_reg_base;
static struct resource *lcdc_regs;
static unsigned int lcd_revision;
static irq_handler_t lcdc_irq_handler;
static wait_queue_head_t frame_done_wq;
static int frame_done_flag;
static inline unsigned int lcdc_read(unsigned int addr)
static unsigned int lcdc_read(unsigned int addr)
{
return (unsigned int)__raw_readl(da8xx_fb_reg_base + (addr));
}
static inline void lcdc_write(unsigned int val, unsigned int addr)
static void lcdc_write(unsigned int val, unsigned int addr)
{
__raw_writel(val, da8xx_fb_reg_base + (addr));
}
struct da8xx_fb_par {
struct device *dev;
resource_size_t p_palette_base;
unsigned char *v_palette_base;
dma_addr_t vram_phys;
......@@ -164,7 +163,6 @@ struct da8xx_fb_par {
struct clk *lcdc_clk;
int irq;
unsigned int palette_sz;
unsigned int pxl_clk;
int blank;
wait_queue_head_t vsync_wait;
int vsync_flag;
......@@ -178,29 +176,15 @@ struct da8xx_fb_par {
unsigned int which_dma_channel_done;
#ifdef CONFIG_CPU_FREQ
struct notifier_block freq_transition;
unsigned int lcd_fck_rate;
#endif
unsigned int lcdc_clk_rate;
void (*panel_power_ctrl)(int);
u32 pseudo_palette[16];
struct fb_videomode mode;
struct lcd_ctrl_config cfg;
};
/* Variable Screen Information */
static struct fb_var_screeninfo da8xx_fb_var = {
.xoffset = 0,
.yoffset = 0,
.transp = {0, 0, 0},
.nonstd = 0,
.activate = 0,
.height = -1,
.width = -1,
.accel_flags = 0,
.left_margin = LEFT_MARGIN,
.right_margin = RIGHT_MARGIN,
.upper_margin = UPPER_MARGIN,
.lower_margin = LOWER_MARGIN,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED
};
static struct fb_var_screeninfo da8xx_fb_var;
static struct fb_fix_screeninfo da8xx_fb_fix = {
.id = "DA8xx FB Drv",
......@@ -219,7 +203,7 @@ static struct fb_videomode known_lcd_panels[] = {
.name = "Sharp_LCD035Q3DG01",
.xres = 320,
.yres = 240,
.pixclock = 4608000,
.pixclock = KHZ2PICOS(4607),
.left_margin = 6,
.right_margin = 8,
.upper_margin = 2,
......@@ -234,7 +218,7 @@ static struct fb_videomode known_lcd_panels[] = {
.name = "Sharp_LK043T1DG01",
.xres = 480,
.yres = 272,
.pixclock = 7833600,
.pixclock = KHZ2PICOS(7833),
.left_margin = 2,
.right_margin = 2,
.upper_margin = 2,
......@@ -249,7 +233,7 @@ static struct fb_videomode known_lcd_panels[] = {
.name = "SP10Q010",
.xres = 320,
.yres = 240,
.pixclock = 7833600,
.pixclock = KHZ2PICOS(7833),
.left_margin = 10,
.right_margin = 10,
.upper_margin = 10,
......@@ -261,8 +245,13 @@ static struct fb_videomode known_lcd_panels[] = {
},
};
static bool da8xx_fb_is_raster_enabled(void)
{
return !!(lcdc_read(LCD_RASTER_CTRL_REG) & LCD_RASTER_ENABLE);
}
/* Enable the Raster Engine of the LCD Controller */
static inline void lcd_enable_raster(void)
static void lcd_enable_raster(void)
{
u32 reg;
......@@ -284,7 +273,7 @@ static inline void lcd_enable_raster(void)
}
/* Disable the Raster Engine of the LCD Controller */
static inline void lcd_disable_raster(bool wait_for_frame_done)
static void lcd_disable_raster(enum da8xx_frame_complete wait_for_frame_done)
{
u32 reg;
int ret;
......@@ -296,7 +285,8 @@ static inline void lcd_disable_raster(bool wait_for_frame_done)
/* return if already disabled */
return;
if ((wait_for_frame_done == true) && (lcd_revision == LCD_VERSION_2)) {
if ((wait_for_frame_done == DA8XX_FRAME_WAIT) &&
(lcd_revision == LCD_VERSION_2)) {
frame_done_flag = 0;
ret = wait_event_interruptible_timeout(frame_done_wq,
frame_done_flag != 0,
......@@ -331,7 +321,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
reg_int = lcdc_read(LCD_INT_ENABLE_SET_REG) |
LCD_V2_END_OF_FRAME0_INT_ENA |
LCD_V2_END_OF_FRAME1_INT_ENA |
LCD_FRAME_DONE;
LCD_FRAME_DONE | LCD_SYNC_LOST;
lcdc_write(reg_int, LCD_INT_ENABLE_SET_REG);
}
reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE;
......@@ -417,10 +407,25 @@ static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width,
u32 reg;
reg = lcdc_read(LCD_RASTER_TIMING_0_REG) & 0xf;
reg |= ((back_porch & 0xff) << 24)
| ((front_porch & 0xff) << 16)
| ((pulse_width & 0x3f) << 10);
reg |= (((back_porch-1) & 0xff) << 24)
| (((front_porch-1) & 0xff) << 16)
| (((pulse_width-1) & 0x3f) << 10);
lcdc_write(reg, LCD_RASTER_TIMING_0_REG);
/*
* LCDC Version 2 adds some extra bits that increase the allowable
* size of the horizontal timing registers.
* remember that the registers use 0 to represent 1 so all values
* that get set into register need to be decremented by 1
*/
if (lcd_revision == LCD_VERSION_2) {
/* Mask off the bits we want to change */
reg = lcdc_read(LCD_RASTER_TIMING_2_REG) & ~0x780000ff;
reg |= ((front_porch-1) & 0x300) >> 8;
reg |= ((back_porch-1) & 0x300) >> 4;
reg |= ((pulse_width-1) & 0x3c0) << 21;
lcdc_write(reg, LCD_RASTER_TIMING_2_REG);
}
}
static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
......@@ -431,7 +436,7 @@ static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
reg = lcdc_read(LCD_RASTER_TIMING_1_REG) & 0x3ff;
reg |= ((back_porch & 0xff) << 24)
| ((front_porch & 0xff) << 16)
| ((pulse_width & 0x3f) << 10);
| (((pulse_width-1) & 0x3f) << 10);
lcdc_write(reg, LCD_RASTER_TIMING_1_REG);
}
......@@ -488,12 +493,12 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg,
else
reg &= ~LCD_SYNC_EDGE;
if (panel->sync & FB_SYNC_HOR_HIGH_ACT)
if ((panel->sync & FB_SYNC_HOR_HIGH_ACT) == 0)
reg |= LCD_INVERT_LINE_CLOCK;
else
reg &= ~LCD_INVERT_LINE_CLOCK;
if (panel->sync & FB_SYNC_VERT_HIGH_ACT)
if ((panel->sync & FB_SYNC_VERT_HIGH_ACT) == 0)
reg |= LCD_INVERT_FRAME_CLOCK;
else
reg &= ~LCD_INVERT_FRAME_CLOCK;
......@@ -565,10 +570,11 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
break;
case 24:
reg |= LCD_V2_TFT_24BPP_MODE;
break;
case 32: