Commit 9839c6b8 authored by Tony Lindgren's avatar Tony Lindgren Committed by Russell King
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[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2



Patch from Tony Lindgren

This patch syncs the mainline kernel with linux-omap tree.
The highlights of the patch are:
- Start adding 24xx support by Paul Mundt
- Clean-up of cpu detection by Dirk Behme and Tony Lindgren
- Add DSP header by Toshihiro Kobayashi
- Add support for mtd-xip by Vladimir Barinov
- Add various new mux registers
- Move OMAP specific serial defines back to serial.h
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 92105bb7
......@@ -30,6 +30,9 @@
#define __ASM_ARCH_OMAP_H4_H
/* Placeholder for H4 specific defines */
/* GPMC CS1 */
#define OMAP24XX_ETHR_START 0x08000300
#define OMAP24XX_ETHR_GPIO_IRQ 92
#endif /* __ASM_ARCH_OMAP_H4_H */
......@@ -36,31 +36,6 @@
#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
/*
* These definitions define an area of FLASH set aside
* for the use of MTD/JFFS2. This is the area of flash
* that a JFFS2 filesystem will reside which is mounted
* at boot with the "root=/dev/mtdblock/0 rw"
* command line option. The flash address used here must
* fall within the legal range defined by rrload for storing
* the filesystem component. This address will be sufficiently
* deep into the overall flash range to avoid the other
* components also stored in flash such as the bootloader,
* the bootloader params, and the kernel.
* The SW2 settings for the map below are:
* 1 off, 2 off, 3 on, 4 off.
*/
/* Intel flash_0, partitioned as expected by rrload */
#define OMAP_FLASH_0_BASE 0xD8000000
#define OMAP_FLASH_0_START 0x00000000
#define OMAP_FLASH_0_SIZE SZ_16M
/* Intel flash_1, used for cramfs or other flash file systems */
#define OMAP_FLASH_1_BASE 0xD9000000
#define OMAP_FLASH_1_START 0x01000000
#define OMAP_FLASH_1_SIZE SZ_16M
#define NR_FPGA_IRQS 24
#define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS
......
......@@ -36,23 +36,14 @@
#define OMAP_SDRAM_DEVICE D256M_1X16_4B
#endif
/*
* These definitions define an area of FLASH set aside
* for the use of MTD/JFFS2. This is the area of flash
* that a JFFS2 filesystem will reside which is mounted
* at boot with the "root=/dev/mtdblock/0 rw"
* command line option.
*/
/* Intel flash_0, partitioned as expected by rrload */
#define OMAP_FLASH_0_BASE 0xD8000000 /* VA */
#define OMAP_FLASH_0_START 0x00000000 /* PA */
#define OMAP_FLASH_0_SIZE SZ_32M
#define MAXIRQNUM IH_BOARD_BASE
#define MAXFIQNUM MAXIRQNUM
#define MAXSWINUM MAXIRQNUM
#define NR_IRQS (MAXIRQNUM + 1)
/* Samsung NAND flash at CS2B or CS3(NAND Boot) */
#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */
#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */
#endif
......@@ -11,11 +11,6 @@
#ifndef __ASM_ARCH_VOICEBLUE_H
#define __ASM_ARCH_VOICEBLUE_H
#if (EXTERNAL_MAX_NR_PORTS < 4)
#undef EXTERNAL_MAX_NR_PORTS
#define EXTERNAL_MAX_NR_PORTS 4
#endif
extern void voiceblue_wdt_enable(void);
extern void voiceblue_wdt_disable(void);
extern void voiceblue_wdt_ping(void);
......
......@@ -30,10 +30,23 @@ struct omap_clock_config {
u8 system_clock_type;
};
struct omap_mmc_conf {
unsigned enabled:1;
/* nomux means "standard" muxing is wrong on this board, and that
* board-specific code handled it before common init logic.
*/
unsigned nomux:1;
/* switch pin can be for card detect (default) or card cover */
unsigned cover:1;
/* 4 wire signaling is optional, and is only used for SD/SDIO */
unsigned wire4:1;
s16 power_pin;
s16 switch_pin;
s16 wp_pin;
};
struct omap_mmc_config {
u8 mmc_blocks;
s16 mmc1_power_pin, mmc2_power_pin;
s16 mmc1_switch_pin, mmc2_switch_pin;
struct omap_mmc_conf mmc[2];
};
struct omap_serial_console_config {
......
......@@ -38,146 +38,179 @@ extern unsigned int system_rev;
/*
* Test if multicore OMAP support is needed
*/
#undef MULTI_OMAP
#undef MULTI_OMAP1
#undef MULTI_OMAP2
#undef OMAP_NAME
#ifdef CONFIG_ARCH_OMAP730
# ifdef OMAP_NAME
# undef MULTI_OMAP
# define MULTI_OMAP
# undef MULTI_OMAP1
# define MULTI_OMAP1
# else
# define OMAP_NAME omap730
# endif
#endif
#ifdef CONFIG_ARCH_OMAP1510
# ifdef OMAP_NAME
# undef MULTI_OMAP
# define MULTI_OMAP
# undef MULTI_OMAP1
# define MULTI_OMAP1
# else
# define OMAP_NAME omap1510
# endif
#endif
#ifdef CONFIG_ARCH_OMAP16XX
# ifdef OMAP_NAME
# undef MULTI_OMAP
# define MULTI_OMAP
# undef MULTI_OMAP1
# define MULTI_OMAP1
# else
# define OMAP_NAME omap1610
# define OMAP_NAME omap16xx
# endif
#endif
#ifdef CONFIG_ARCH_OMAP16XX
# ifdef OMAP_NAME
# undef MULTI_OMAP
# define MULTI_OMAP
#ifdef CONFIG_ARCH_OMAP24XX
# if (defined(OMAP_NAME) || defined(MULTI_OMAP1))
# error "OMAP1 and OMAP2 can't be selected at the same time"
# else
# define OMAP_NAME omap1710
# undef MULTI_OMAP2
# define OMAP_NAME omap24xx
# endif
#endif
/*
* Generate various OMAP cpu specific macros, and cpu class
* specific macros
* Macros to group OMAP into cpu classes.
* These can be used in most places.
* cpu_is_omap7xx(): True for OMAP730
* cpu_is_omap15xx(): True for OMAP1510 and OMAP5910
* cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
* cpu_is_omap24xx(): True for OMAP2420
*/
#define GET_OMAP_TYPE ((system_rev >> 24) & 0xff)
#define GET_OMAP_CLASS (system_rev & 0xff)
#define IS_OMAP_TYPE(type, id) \
static inline int is_omap ##type (void) \
{ \
return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
}
#define IS_OMAP_CLASS(class, id) \
static inline int is_omap ##class (void) \
{ \
return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
}
IS_OMAP_TYPE(730, 0x07)
IS_OMAP_TYPE(1510, 0x15)
IS_OMAP_TYPE(1610, 0x16)
IS_OMAP_TYPE(5912, 0x16)
IS_OMAP_TYPE(1710, 0x17)
IS_OMAP_TYPE(2420, 0x24)
IS_OMAP_CLASS(7xx, 0x07)
IS_OMAP_CLASS(15xx, 0x15)
IS_OMAP_CLASS(16xx, 0x16)
IS_OMAP_CLASS(24xx, 0x24)
/*
* Macros to group OMAP types into cpu classes.
* These can be used in most places.
* cpu_is_omap15xx(): True for 1510 and 5910
* cpu_is_omap16xx(): True for 1610, 5912 and 1710
*/
#if defined(MULTI_OMAP)
# define cpu_is_omap7xx() is_omap7xx()
# define cpu_is_omap15xx() is_omap15xx()
# if !(defined(CONFIG_ARCH_OMAP1510) || defined(CONFIG_ARCH_OMAP730))
# define cpu_is_omap16xx() 1
# else
#define cpu_is_omap7xx() 0
#define cpu_is_omap15xx() 0
#define cpu_is_omap16xx() 0
#define cpu_is_omap24xx() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() is_omap7xx()
# endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() is_omap15xx()
# endif
# if defined(CONFIG_ARCH_OMAP16XX)
# undef cpu_is_omap16xx
# define cpu_is_omap16xx() is_omap16xx()
# endif
#else
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() 1
# else
# define cpu_is_omap7xx() 0
# endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() 1
# else
# define cpu_is_omap15xx() 0
# endif
# if defined(CONFIG_ARCH_OMAP16XX)
# undef cpu_is_omap16xx
# define cpu_is_omap16xx() 1
# else
# define cpu_is_omap16xx() 0
# endif
# if defined(CONFIG_ARCH_OMAP24XX)
# undef cpu_is_omap24xx
# define cpu_is_omap24xx() 1
# endif
#endif
#if defined(MULTI_OMAP)
# define cpu_is_omap730() is_omap730()
# define cpu_is_omap1510() is_omap1510()
# define cpu_is_omap1610() is_omap1610()
# define cpu_is_omap5912() is_omap5912()
# define cpu_is_omap1710() is_omap1710()
/*
* Macros to detect individual cpu types.
* These are only rarely needed.
* cpu_is_omap730(): True for OMAP730
* cpu_is_omap1510(): True for OMAP1510
* cpu_is_omap1610(): True for OMAP1610
* cpu_is_omap1611(): True for OMAP1611
* cpu_is_omap5912(): True for OMAP5912
* cpu_is_omap1621(): True for OMAP1621
* cpu_is_omap1710(): True for OMAP1710
* cpu_is_omap2420(): True for OMAP2420
*/
#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff)
#define IS_OMAP_TYPE(type, id) \
static inline int is_omap ##type (void) \
{ \
return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
}
IS_OMAP_TYPE(730, 0x0730)
IS_OMAP_TYPE(1510, 0x1510)
IS_OMAP_TYPE(1610, 0x1610)
IS_OMAP_TYPE(1611, 0x1611)
IS_OMAP_TYPE(5912, 0x1611)
IS_OMAP_TYPE(1621, 0x1621)
IS_OMAP_TYPE(1710, 0x1710)
IS_OMAP_TYPE(2420, 0x2420)
#define cpu_is_omap730() 0
#define cpu_is_omap1510() 0
#define cpu_is_omap1610() 0
#define cpu_is_omap5912() 0
#define cpu_is_omap1611() 0
#define cpu_is_omap1621() 0
#define cpu_is_omap1710() 0
#define cpu_is_omap2420() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() is_omap730()
# endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap1510
# define cpu_is_omap1510() is_omap1510()
# endif
#else
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() 1
# else
# define cpu_is_omap730() 0
# endif
# if defined(CONFIG_ARCH_OMAP1510)
# undef cpu_is_omap1510
# define cpu_is_omap1510() 1
# else
# define cpu_is_omap1510() 0
# endif
# if defined(CONFIG_ARCH_OMAP16XX)
# define cpu_is_omap1610() 1
# else
# define cpu_is_omap1610() 0
# endif
# if defined(CONFIG_ARCH_OMAP16XX)
# define cpu_is_omap5912() 1
# else
# define cpu_is_omap5912() 0
# endif
# if defined(CONFIG_ARCH_OMAP16XX)
#endif
/*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
* between 1611B/5912 and 1710.
*/
#if defined(CONFIG_ARCH_OMAP16XX)
# undef cpu_is_omap1610
# undef cpu_is_omap1611
# undef cpu_is_omap5912
# undef cpu_is_omap1621
# undef cpu_is_omap1710
# define cpu_is_omap1610() is_omap1610()
# define cpu_is_omap1611() is_omap1611()
# define cpu_is_omap5912() is_omap5912()
# define cpu_is_omap1621() is_omap1621()
# define cpu_is_omap1710() is_omap1710()
# else
# define cpu_is_omap1610() 0
# define cpu_is_omap5912() 0
# define cpu_is_omap1710() 0
# endif
# if defined(CONFIG_ARCH_OMAP2420)
#endif
#if defined(CONFIG_ARCH_OMAP2420)
# undef cpu_is_omap2420
# define cpu_is_omap2420() 1
# else
# define cpu_is_omap2420() 0
# endif
#endif
#endif
......@@ -14,6 +14,7 @@
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
#ifdef CONFIG_ARCH_OMAP1
moveq \rx, #0xff000000 @ physical base address
movne \rx, #0xfe000000 @ virtual base
orr \rx, \rx, #0x00fb0000
......@@ -22,6 +23,18 @@
#endif
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
orr \rx, \rx, #0x00000800 @ UART 2 & 3
#endif
#elif CONFIG_ARCH_OMAP2
moveq \rx, #0x48000000 @ physical base address
movne \rx, #0xd8000000 @ virtual base
orr \rx, \rx, #0x0006a000
#ifdef CONFIG_OMAP_LL_DEBUG_UART2
add \rx, \rx, #0x00002000 @ UART 2
#endif
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
add \rx, \rx, #0x00004000 @ UART 3
#endif
#endif
.endm
......
......@@ -240,6 +240,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
extern dma_addr_t omap_get_dma_src_pos(int lch);
extern dma_addr_t omap_get_dma_dst_pos(int lch);
extern int omap_get_dma_src_addr_counter(int lch);
extern void omap_clear_dma(int lch);
extern int omap_dma_running(void);
......
/*
* linux/include/asm-arm/arm/arch-omap/dmtimer.h
*
* OMAP Dual-Mode Timers
*
* Copyright (C) 2005 Nokia Corporation
* Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ASM_ARCH_TIMER_H
#define __ASM_ARCH_TIMER_H
#include <linux/list.h>
#define OMAP_TIMER_SRC_ARMXOR 0x00
#define OMAP_TIMER_SRC_32_KHZ 0x01
#define OMAP_TIMER_SRC_EXT_CLK 0x02
/* timer control reg bits */
#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
#define OMAP_TIMER_CTRL_PT (1 << 12)
#define OMAP_TIMER_CTRL_TRG_OVERFLOW (0x1 << 10)
#define OMAP_TIMER_CTRL_TRG_OFANDMATCH (0x2 << 10)
#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */
#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
/* timer interrupt enable bits */
#define OMAP_TIMER_INT_CAPTURE (1 << 2)
#define OMAP_TIMER_INT_OVERFLOW (1 << 1)
#define OMAP_TIMER_INT_MATCH (1 << 0)
struct omap_dm_timer {
struct list_head timer_list;
u32 base;
unsigned int irq;
};
u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg);
void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value);
struct omap_dm_timer * omap_dm_timer_request(void);
void omap_dm_timer_free(struct omap_dm_timer *timer);
void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value);
void omap_dm_timer_enable_compare(struct omap_dm_timer *timer);
void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer);
void omap_dm_timer_trigger(struct omap_dm_timer *timer);
void omap_dm_timer_start(struct omap_dm_timer *timer);
void omap_dm_timer_stop(struct omap_dm_timer *timer);
void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load);
void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match);
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
void omap_dm_timer_reset_counter(struct omap_dm_timer *timer);
int omap_dm_timers_active(void);
#endif /* __ASM_ARCH_TIMER_H */
/*
* linux/include/asm-arm/arch-omap/dsp.h
*
* Header for OMAP DSP driver
*
* Copyright (C) 2002-2005 Nokia Corporation
*
* Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* 2005/06/01: DSP Gateway version 3.3
*/
#ifndef ASM_ARCH_DSP_H
#define ASM_ARCH_DSP_H
/*
* for /dev/dspctl/ctl
*/
#define OMAP_DSP_IOCTL_RESET 1
#define OMAP_DSP_IOCTL_RUN 2
#define OMAP_DSP_IOCTL_SETRSTVECT 3
#define OMAP_DSP_IOCTL_CPU_IDLE 4
#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_ON 5
#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_OFF 6
#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_ON 7
#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_OFF 8
#define OMAP_DSP_IOCTL_GBL_IDLE 9
#define OMAP_DSP_IOCTL_DSPCFG 10
#define OMAP_DSP_IOCTL_DSPUNCFG 11
#define OMAP_DSP_IOCTL_TASKCNT 12
#define OMAP_DSP_IOCTL_POLL 13
#define OMAP_DSP_IOCTL_REGMEMR 40
#define OMAP_DSP_IOCTL_REGMEMW 41
#define OMAP_DSP_IOCTL_REGIOR 42
#define OMAP_DSP_IOCTL_REGIOW 43
#define OMAP_DSP_IOCTL_GETVAR 44
#define OMAP_DSP_IOCTL_SETVAR 45
#define OMAP_DSP_IOCTL_RUNLEVEL 50
#define OMAP_DSP_IOCTL_SUSPEND 51
#define OMAP_DSP_IOCTL_RESUME 52
#define OMAP_DSP_IOCTL_FBEN 53
#define OMAP_DSP_IOCTL_FBDIS 54
#define OMAP_DSP_IOCTL_MBSEND 99
/*
* for taskdev
* (ioctls below should be >= 0x10000)
*/
#define OMAP_DSP_TASK_IOCTL_BFLSH 0x10000
#define OMAP_DSP_TASK_IOCTL_SETBSZ 0x10001
#define OMAP_DSP_TASK_IOCTL_LOCK 0x10002
#define OMAP_DSP_TASK_IOCTL_UNLOCK 0x10003
#define OMAP_DSP_TASK_IOCTL_GETNAME 0x10004
/*
* for /dev/dspctl/mem
*/
#define OMAP_DSP_MEM_IOCTL_EXMAP 1
#define OMAP_DSP_MEM_IOCTL_EXUNMAP 2
#define OMAP_DSP_MEM_IOCTL_EXMAP_FLUSH 3
#define OMAP_DSP_MEM_IOCTL_FBEXPORT 5
#define OMAP_DSP_MEM_IOCTL_MMUITACK 7
#define OMAP_DSP_MEM_IOCTL_MMUINIT 9
#define OMAP_DSP_MEM_IOCTL_KMEM_RESERVE 11
#define OMAP_DSP_MEM_IOCTL_KMEM_RELEASE 12
struct omap_dsp_mapinfo {
unsigned long dspadr;
unsigned long size;
};
/*
* for /dev/dspctl/twch
*/
#define OMAP_DSP_TWCH_IOCTL_MKDEV 1
#define OMAP_DSP_TWCH_IOCTL_RMDEV 2
#define OMAP_DSP_TWCH_IOCTL_TADD 11
#define OMAP_DSP_TWCH_IOCTL_TDEL 12
#define OMAP_DSP_TWCH_IOCTL_TKILL 13
#define OMAP_DSP_DEVSTATE_NOTASK 0x00000001
#define OMAP_DSP_DEVSTATE_ATTACHED 0x00000002
#define OMAP_DSP_DEVSTATE_GARBAGE 0x00000004
#define OMAP_DSP_DEVSTATE_INVALID 0x00000008
#define OMAP_DSP_DEVSTATE_ADDREQ 0x00000100
#define OMAP_DSP_DEVSTATE_DELREQ 0x00000200
#define OMAP_DSP_DEVSTATE_ADDFAIL 0x00001000
#define OMAP_DSP_DEVSTATE_ADDING 0x00010000
#define OMAP_DSP_DEVSTATE_DELING 0x00020000
#define OMAP_DSP_DEVSTATE_KILLING 0x00040000
#define OMAP_DSP_DEVSTATE_STATE_MASK 0x7fffffff
#define OMAP_DSP_DEVSTATE_STALE 0x80000000
struct omap_dsp_taddinfo {
unsigned char minor;
unsigned long taskadr;
};
#define OMAP_DSP_TADD_ABORTADR 0xffffffff
/*
* error cause definition (for error detection device)
*/
#define OMAP_DSP_ERRDT_WDT 0x00000001
#define OMAP_DSP_ERRDT_MMU 0x00000002
/*
* mailbox protocol definitions
*/
struct omap_dsp_mailbox_cmd {
unsigned short cmd;
unsigned short data;
};