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Commit 937a8015 authored by Ralf Baechle's avatar Ralf Baechle
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[MIPS] Complete fixes after removal of pt_regs argument to int handlers. 


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 31aa3665
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arch/mips/au1000/common/dma.c
View file @ 937a8015
......@@ -160,7 +160,7 @@ void dump_au1000_dma_channel(unsigned int dmanr)
* Requests the DMA done IRQ if irqhandler != NULL.
*/
int request_au1000_dma(int dev_id, const char *dev_str,
irqreturn_t (*irqhandler)(int, void *, struct pt_regs *),
irqreturn_t (*irqhandler)(int, void *),
unsigned long irqflags,
void *irq_dev_id)
{
......
arch/mips/au1000/common/irq.c
View file @ 937a8015
......@@ -67,7 +67,7 @@
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
extern void mips_timer_interrupt(struct pt_regs *regs);
extern void mips_timer_interrupt(void);
static void setup_local_irq(unsigned int irq, int type, int int_req);
static unsigned int startup_irq(unsigned int irq);
......@@ -81,10 +81,6 @@ inline void local_disable_irq(unsigned int irq_nr);
void (*board_init_irq)(void);
#ifdef CONFIG_PM
extern irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
#endif
static DEFINE_SPINLOCK(irq_lock);
......@@ -292,7 +288,7 @@ static struct irq_chip level_irq_type = {
};
#ifdef CONFIG_PM
void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *))
void startup_match20_interrupt(irqreturn_t (*handler)(int, void *))
{
struct irq_desc *desc = &irq_desc[AU1000_TOY_MATCH2_INT];
......@@ -501,14 +497,15 @@ void __init arch_init_irq(void)
* intcX_reqX_irqdispatch().
*/
void intc0_req0_irqdispatch(struct pt_regs *regs)
static void intc0_req0_irqdispatch(void)
{
int irq = 0;
static unsigned long intc0_req0 = 0;
intc0_req0 |= au_readl(IC0_REQ0INT);
if (!intc0_req0) return;
if (!intc0_req0)
return;
#ifdef AU1000_USB_DEV_REQ_INT
/*
* Because of the tight timing of SETUP token to reply
......@@ -517,28 +514,29 @@ void intc0_req0_irqdispatch(struct pt_regs *regs)
*/
if ((intc0_req0 & (1<<AU1000_USB_DEV_REQ_INT))) {
intc0_req0 &= ~(1<<AU1000_USB_DEV_REQ_INT);
do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
do_IRQ(AU1000_USB_DEV_REQ_INT);
return;
}
#endif
irq = au_ffs(intc0_req0) - 1;
intc0_req0 &= ~(1<<irq);
do_IRQ(irq, regs);
do_IRQ(irq);
}
void intc0_req1_irqdispatch(struct pt_regs *regs)
static void intc0_req1_irqdispatch(void)
{
int irq = 0;
static unsigned long intc0_req1 = 0;
intc0_req1 |= au_readl(IC0_REQ1INT);
if (!intc0_req1) return;
if (!intc0_req1)
return;
irq = au_ffs(intc0_req1) - 1;
intc0_req1 &= ~(1<<irq);
do_IRQ(irq, regs);
do_IRQ(irq);
}
......@@ -546,35 +544,37 @@ void intc0_req1_irqdispatch(struct pt_regs *regs)
* Interrupt Controller 1:
* interrupts 32 - 63
*/
void intc1_req0_irqdispatch(struct pt_regs *regs)
static void intc1_req0_irqdispatch(void)
{
int irq = 0;
static unsigned long intc1_req0 = 0;
intc1_req0 |= au_readl(IC1_REQ0INT);
if (!intc1_req0) return;
if (!intc1_req0)
return;
irq = au_ffs(intc1_req0) - 1;
intc1_req0 &= ~(1<<irq);
irq += 32;
do_IRQ(irq, regs);
do_IRQ(irq);
}
void intc1_req1_irqdispatch(struct pt_regs *regs)
static void intc1_req1_irqdispatch(void)
{
int irq = 0;
static unsigned long intc1_req1 = 0;
intc1_req1 |= au_readl(IC1_REQ1INT);
if (!intc1_req1) return;
if (!intc1_req1)
return;
irq = au_ffs(intc1_req1) - 1;
intc1_req1 &= ~(1<<irq);
irq += 32;
do_IRQ(irq, regs);
do_IRQ(irq);
}
#ifdef CONFIG_PM
......@@ -660,20 +660,20 @@ restore_au1xxx_intctl(void)
}
#endif /* CONFIG_PM */
asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
if (pending & CAUSEF_IP7)
mips_timer_interrupt(regs);
mips_timer_interrupt();
else if (pending & CAUSEF_IP2)
intc0_req0_irqdispatch(regs);
intc0_req0_irqdispatch();
else if (pending & CAUSEF_IP3)
intc0_req1_irqdispatch(regs);
intc0_req1_irqdispatch();
else if (pending & CAUSEF_IP4)
intc1_req0_irqdispatch(regs);
intc1_req0_irqdispatch();
else if (pending & CAUSEF_IP5)
intc1_req1_irqdispatch(regs);
intc1_req1_irqdispatch();
else
spurious_interrupt(regs);
spurious_interrupt();
}
arch/mips/au1000/common/time.c
View file @ 937a8015
......@@ -62,7 +62,7 @@ static unsigned int timerhi = 0, timerlo = 0;
#error "unsupported HZ value! Must be in [100,1000]"
#endif
#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */
extern void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *));
extern void startup_match20_interrupt(irqreturn_t (*handler)(int, void *));
static unsigned long last_pc0, last_match20;
#endif
......@@ -79,7 +79,8 @@ static inline void ack_r4ktimer(unsigned long newval)
* is provably more robust.
*/
unsigned long wtimer;
void mips_timer_interrupt(struct pt_regs *regs)
void mips_timer_interrupt(void)
{
int irq = 63;
unsigned long count;
......@@ -98,7 +99,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
kstat_this_cpu.irqs[irq]++;
do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(regs));
update_process_times(user_mode(get_irq_regs()));
#endif
r4k_cur += r4k_offset;
ack_r4ktimer(r4k_cur);
......@@ -115,7 +116,7 @@ null:
}
#ifdef CONFIG_PM
irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
irqreturn_t counter0_irq(int irq, void *dev_id)
{
unsigned long pc0;
int time_elapsed;
......@@ -139,7 +140,7 @@ irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
while (time_elapsed > 0) {
do_timer(1);
#ifndef CONFIG_SMP
update_process_times(user_mode(regs));
update_process_times(user_mode(get_irq_regs()));
#endif
time_elapsed -= MATCH20_INC;
last_match20 += MATCH20_INC;
......@@ -158,7 +159,7 @@ irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
jiffie_drift -= 999;
do_timer(1); /* increment jiffies by one */
#ifndef CONFIG_SMP
update_process_times(user_mode(regs));
update_process_times(user_mode(get_irq_regs()));
#endif
}
......
arch/mips/au1000/common/usbdev.c
View file @ 937a8015
......@@ -1031,8 +1031,7 @@ process_ep_receive (struct usb_dev* dev, endpoint_t *ep)
/* This ISR handles the receive complete and suspend events */
static void
req_sus_intr (int irq, void *dev_id, struct pt_regs *regs)
static void req_sus_intr (int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
u32 status;
......@@ -1050,8 +1049,7 @@ req_sus_intr (int irq, void *dev_id, struct pt_regs *regs)
/* This ISR handles the DMA done events on EP0 */
static void
dma_done_ep0_intr(int irq, void *dev_id, struct pt_regs *regs)
static void dma_done_ep0_intr(int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
usbdev_pkt_t* pkt;
......@@ -1094,8 +1092,7 @@ dma_done_ep0_intr(int irq, void *dev_id, struct pt_regs *regs)
}
/* This ISR handles the DMA done events on endpoints 2,3,4,5 */
static void
dma_done_ep_intr(int irq, void *dev_id, struct pt_regs *regs)
static void dma_done_ep_intr(int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
int i;
......
arch/mips/au1000/pb1200/irqmap.c
View file @ 937a8015
......@@ -65,7 +65,7 @@ int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
*/
static volatile int pb1200_cascade_en=0;
irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
{
unsigned short bisr = bcsr->int_status;
int extirq_nr = 0;
......@@ -76,8 +76,9 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
{
extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
/* Ack and dispatch IRQ */
do_IRQ(extirq_nr,regs);
do_IRQ(extirq_nr);
}
return IRQ_RETVAL(1);
}
......
arch/mips/basler/excite/excite_dbg_io.c
View file @ 937a8015
......@@ -112,7 +112,7 @@ int putDebugChar(int data)
}
/* KGDB interrupt handler */
asmlinkage void excite_kgdb_inthdl(struct pt_regs *regs)
asmlinkage void excite_kgdb_inthdl(void)
{
if (unlikely(
((titan_readl(UAIIR) & 0x7) == 4)
......
arch/mips/basler/excite/excite_iodev.c
View file @ 937a8015
......@@ -38,7 +38,7 @@ static int iodev_open(struct inode *, struct file *);
static int iodev_release(struct inode *, struct file *);
static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
static unsigned int iodev_poll(struct file *, struct poll_table_struct *);
static irqreturn_t iodev_irqhdl(int, void *, struct pt_regs *);
static irqreturn_t iodev_irqhdl(int, void *);
......@@ -108,16 +108,12 @@ static int __exit iodev_remove(struct device *dev)
return misc_deregister(&miscdev);
}
static int iodev_open(struct inode *i, struct file *f)
{
return request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
iodev_name, &miscdev);
}
static int iodev_release(struct inode *i, struct file *f)
{
free_irq(iodev_irq, &miscdev);
......@@ -148,17 +144,13 @@ static unsigned int iodev_poll(struct file *f, struct poll_table_struct *p)
return POLLOUT | POLLWRNORM;
}
static irqreturn_t iodev_irqhdl(int irq, void *ctxt, struct pt_regs *regs)
static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
{
wake_up(&wq);
return IRQ_HANDLED;
}
static int __init iodev_init_module(void)
{
return driver_register(&iodev_driver);
......
arch/mips/basler/excite/excite_irq.c
View file @ 937a8015
......@@ -56,7 +56,7 @@ void __init arch_init_irq(void)
#endif
}
asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
asmlinkage void plat_irq_dispatch(void)
{
const u32
interrupts = read_c0_cause() >> 8,
......@@ -67,7 +67,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
/* process timer interrupt */
if (pending & (1 << TIMER_IRQ)) {
do_IRQ(TIMER_IRQ, regs);
do_IRQ(TIMER_IRQ);
return;
}
......@@ -80,7 +80,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
#else
if (pending & (1 << USB_IRQ)) {
#endif
do_IRQ(USB_IRQ, regs);
do_IRQ(USB_IRQ);
return;
}
......@@ -91,9 +91,9 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
if ((pending & (1 << TITAN_IRQ)) && msgint) {
ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
#if defined(CONFIG_KGDB)
excite_kgdb_inthdl(regs);
excite_kgdb_inthdl();
#endif
do_IRQ(TITAN_IRQ, regs);
do_IRQ(TITAN_IRQ);
return;
}
......@@ -102,7 +102,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
if ((pending & (1 << FPGA0_IRQ)) && msgint) {
do_IRQ(FPGA0_IRQ, regs);
do_IRQ(FPGA0_IRQ);
return;
}
......@@ -111,7 +111,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
if ((pending & (1 << FPGA1_IRQ)) && msgint) {
do_IRQ(FPGA1_IRQ, regs);
do_IRQ(FPGA1_IRQ);
return;
}
......@@ -120,10 +120,10 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
if ((pending & (1 << PHY_IRQ)) && msgint) {
do_IRQ(PHY_IRQ, regs);
do_IRQ(PHY_IRQ);
return;
}
/* Process spurious interrupts */
spurious_interrupt(regs);
spurious_interrupt();
}
arch/mips/cobalt/irq.c
View file @ 937a8015
......@@ -42,7 +42,7 @@
* 15 - IDE1
*/
static inline void galileo_irq(struct pt_regs *regs)
static inline void galileo_irq(void)
{
unsigned int mask, pending, devfn;
......@@ -52,7 +52,7 @@ static inline void galileo_irq(struct pt_regs *regs)
if (pending & GALILEO_INTR_T0EXP) {
GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS);
do_IRQ(COBALT_GALILEO_IRQ, regs);
do_IRQ(COBALT_GALILEO_IRQ);
} else if (pending & GALILEO_INTR_RETRY_CTR) {
......@@ -68,44 +68,31 @@ static inline void galileo_irq(struct pt_regs *regs)
}
}
static inline void via_pic_irq(struct pt_regs *regs)
static inline void via_pic_irq(void)
{
int irq;
irq = i8259_irq();
if (irq >= 0)
do_IRQ(irq, regs);
do_IRQ(irq);
}
asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
asmlinkage void plat_irq_dispatch(void)
{
unsigned pending;
pending = read_c0_status() & read_c0_cause();
if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
galileo_irq(regs);
else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
via_pic_irq(regs);
else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
do_IRQ(COBALT_CPU_IRQ + 3, regs);
else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
do_IRQ(COBALT_CPU_IRQ + 4, regs);
else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
do_IRQ(COBALT_CPU_IRQ + 5, regs);
else if (pending & CAUSEF_IP7) /* IRQ 23 */
do_IRQ(COBALT_CPU_IRQ + 7, regs);
unsigned pending = read_c0_status() & read_c0_cause();
if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
galileo_irq();
else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
via_pic_irq();
else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
do_IRQ(COBALT_CPU_IRQ + 3);
else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
do_IRQ(COBALT_CPU_IRQ + 4);
else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
do_IRQ(COBALT_CPU_IRQ + 5);
else if (pending & CAUSEF_IP7) /* IRQ 23 */
do_IRQ(COBALT_CPU_IRQ + 7);
}
static struct irqaction irq_via = {
......
arch/mips/ddb5xxx/ddb5477/irq.c
View file @ 937a8015
......@@ -153,8 +153,7 @@ u8 i8259_interrupt_ack(void)
* the first level int-handler will jump here if it is a vrc5477 irq
*/
#define NUM_5477_IRQS 32
static void
vrc5477_irq_dispatch(struct pt_regs *regs)
static void vrc5477_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
......@@ -178,7 +177,7 @@ vrc5477_irq_dispatch(struct pt_regs *regs)
/* check for i8259 interrupts */
if (intStatus & (1 << VRC5477_I8259_CASCADE)) {
int i8259_irq = i8259_interrupt_ack();
do_IRQ(I8259_IRQ_BASE + i8259_irq, regs);
do_IRQ(I8259_IRQ_BASE + i8259_irq);
return;
}
}
......@@ -186,7 +185,7 @@ vrc5477_irq_dispatch(struct pt_regs *regs)
for (i=0, bitmask=1; i<= NUM_5477_IRQS; bitmask <<=1, i++) {
/* do we need to "and" with the int mask? */
if (intStatus & bitmask) {
do_IRQ(VRC5477_IRQ_BASE + i, regs);
do_IRQ(VRC5477_IRQ_BASE + i);
return;
}
}
......@@ -194,18 +193,18 @@ vrc5477_irq_dispatch(struct pt_regs *regs)
#define VR5477INTS (STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6)
asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP7)
do_IRQ(CPU_IRQ_BASE + 7, regs);
do_IRQ(CPU_IRQ_BASE + 7);
else if (pending & VR5477INTS)
vrc5477_irq_dispatch(regs);
vrc5477_irq_dispatch();
else if (pending & STATUSF_IP0)
do_IRQ(CPU_IRQ_BASE, regs);
do_IRQ(CPU_IRQ_BASE);
else if (pending & STATUSF_IP1)
do_IRQ(CPU_IRQ_BASE + 1, regs);
do_IRQ(CPU_IRQ_BASE + 1);
else
spurious_interrupt(regs);
spurious_interrupt();
}
arch/mips/dec/int-handler.S
View file @ 937a8015
......@@ -264,8 +264,10 @@
srlv t3,t1,t2
handle_it:
LONG_L s0, TI_REGS($28)
LONG_S sp, TI_REGS($28)
jal do_IRQ
move a1,sp
LONG_S s0, TI_REGS($28)
j ret_from_irq
nop
......
arch/mips/emma2rh/common/irq.c
View file @ 937a8015
......@@ -39,7 +39,7 @@
/*
* the first level int-handler will jump here if it is a emma2rh irq
*/
asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
void emma2rh_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
......@@ -56,7 +56,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (swIntStatus & bitmask) {
do_IRQ(EMMA2RH_SW_IRQ_BASE + i, regs);
do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
return;
}
}
......@@ -65,7 +65,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
......@@ -81,7 +81,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (gpioIntStatus & bitmask) {
do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i, regs);
do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
return;
}
}
......@@ -90,7 +90,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
......@@ -100,7 +100,7 @@ asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
......
arch/mips/emma2rh/markeins/irq.c
View file @ 937a8015
......@@ -57,7 +57,7 @@
extern void emma2rh_sw_irq_init(u32 base);
extern void emma2rh_gpio_irq_init(u32 base);
extern void emma2rh_irq_init(u32 base);
extern asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs);
extern void emma2rh_irq_dispatch(void);
static struct irqaction irq_cascade = {
.handler = no_action,
......@@ -114,20 +114,20 @@ void __init arch_init_irq(void)
setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
}
asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP7)
do_IRQ(CPU_IRQ_BASE + 7, regs);
do_IRQ(CPU_IRQ_BASE + 7);
else if (pending & STATUSF_IP2)
emma2rh_irq_dispatch(regs);
emma2rh_irq_dispatch();
else if (pending & STATUSF_IP1)
do_IRQ(CPU_IRQ_BASE + 1, regs);
do_IRQ(CPU_IRQ_BASE + 1);
else if (pending & STATUSF_IP0)
do_IRQ(CPU_IRQ_BASE + 0, regs);
do_IRQ(CPU_IRQ_BASE + 0);
else
spurious_interrupt(regs);