Commit 89052bd7 authored by Ralf Baechle's avatar Ralf Baechle
Browse files

[MIPS] Fix build for PNX platforms.

Build error was caused by commit 35133692

.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 330117ff
......@@ -1226,6 +1226,28 @@ void au1x00_fixup_config_od(void)
}
}
/* CP0 hazard avoidance. */
#define NXP_BARRIER() \
__asm__ __volatile__( \
".set noreorder\n\t" \
"nop; nop; nop; nop; nop; nop;\n\t" \
".set reorder\n\t")
static void nxp_pr4450_fixup_config(void)
{
unsigned long config0;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7 << 25) | (7 << 28));
config0 |= (((_page_cachable_default >> _CACHE_SHIFT) << 0) |
((_page_cachable_default >> _CACHE_SHIFT) << 25) |
((_page_cachable_default >> _CACHE_SHIFT) << 28));
write_c0_config(config0);
NXP_BARRIER();
}
static int __cpuinitdata cca = -1;
static int __init cca_setup(char *str)
......@@ -1271,6 +1293,10 @@ static void __cpuinit coherency_setup(void)
case CPU_AU1500: /* rev. AB */
au1x00_fixup_config_od();
break;
case PRID_IMP_PR4450:
nxp_pr4450_fixup_config();
break;
}
}
......
......@@ -47,16 +47,7 @@
void __init board_setup(void)
{
unsigned long config0, configpr;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7<<25) | (7<<28));
config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
(CONF_CM_DEFAULT<<28));
write_c0_config(config0);
BARRIER;
unsigned long configpr;
configpr = read_c0_config7();
configpr |= (1<<19); /* enable tlb */
......
......@@ -33,15 +33,7 @@
void __init board_setup(void)
{
unsigned long config0, configpr;
config0 = read_c0_config();
/* clear all three cache coherency fields */
config0 &= ~(0x7 | (7<<25) | (7<<28));
config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
(CONF_CM_DEFAULT<<28));
write_c0_config(config0);
unsigned long configpr;
configpr = read_c0_config7();
configpr |= (1<<19); /* enable tlb */
......
......@@ -134,6 +134,4 @@
#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
#endif /* _ASM_PGTABLE_BITS_H */
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment