Commit 88b4132e authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz
Browse files

ide: set/clear drive->waiting_for_dma flag in the core code



Set/clear drive->waiting_for_dma flag in the core code
instead of in ->dma_setup and ->dma_end methods.

There should be no functional changes caused by this patch.
Acked-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent 11998b31
...@@ -290,7 +290,6 @@ static int auide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -290,7 +290,6 @@ static int auide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
if (auide_build_dmatable(drive, cmd) == 0) if (auide_build_dmatable(drive, cmd) == 0)
return 1; return 1;
drive->waiting_for_dma = 1;
return 0; return 0;
} }
...@@ -315,16 +314,11 @@ static void auide_dma_host_set(ide_drive_t *drive, int on) ...@@ -315,16 +314,11 @@ static void auide_dma_host_set(ide_drive_t *drive, int on)
static void auide_ddma_tx_callback(int irq, void *param) static void auide_ddma_tx_callback(int irq, void *param)
{ {
_auide_hwif *ahwif = (_auide_hwif*)param;
ahwif->drive->waiting_for_dma = 0;
} }
static void auide_ddma_rx_callback(int irq, void *param) static void auide_ddma_rx_callback(int irq, void *param)
{ {
_auide_hwif *ahwif = (_auide_hwif*)param;
ahwif->drive->waiting_for_dma = 0;
} }
#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ #endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags) static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags)
......
...@@ -318,7 +318,6 @@ static int cmd646_1_dma_end(ide_drive_t *drive) ...@@ -318,7 +318,6 @@ static int cmd646_1_dma_end(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
u8 dma_stat = 0, dma_cmd = 0; u8 dma_stat = 0, dma_cmd = 0;
drive->waiting_for_dma = 0;
/* get DMA status */ /* get DMA status */
dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
/* read DMA command state */ /* read DMA command state */
......
...@@ -287,8 +287,6 @@ static int icside_dma_end(ide_drive_t *drive) ...@@ -287,8 +287,6 @@ static int icside_dma_end(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
struct expansion_card *ec = ECARD_DEV(hwif->dev); struct expansion_card *ec = ECARD_DEV(hwif->dev);
drive->waiting_for_dma = 0;
disable_dma(ec->dma); disable_dma(ec->dma);
return get_dma_residue(ec->dma) != 0; return get_dma_residue(ec->dma) != 0;
...@@ -343,8 +341,6 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -343,8 +341,6 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents); set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents);
set_dma_mode(ec->dma, dma_mode); set_dma_mode(ec->dma, dma_mode);
drive->waiting_for_dma = 1;
return 0; return 0;
} }
......
...@@ -342,8 +342,10 @@ static ide_startstop_t ide_pc_intr(ide_drive_t *drive) ...@@ -342,8 +342,10 @@ static ide_startstop_t ide_pc_intr(ide_drive_t *drive)
stat = tp_ops->read_status(hwif); stat = tp_ops->read_status(hwif);
if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) { if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
int rc = hwif->dma_ops->dma_end(drive); int rc;
drive->waiting_for_dma = 0;
rc = hwif->dma_ops->dma_end(drive);
ide_destroy_dmatable(drive); ide_destroy_dmatable(drive);
if (rc || (drive->media == ide_tape && (stat & ATA_ERR))) { if (rc || (drive->media == ide_tape && (stat & ATA_ERR))) {
......
...@@ -638,6 +638,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive) ...@@ -638,6 +638,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
dma = drive->dma; dma = drive->dma;
if (dma) { if (dma) {
drive->dma = 0; drive->dma = 0;
drive->waiting_for_dma = 0;
dma_error = hwif->dma_ops->dma_end(drive); dma_error = hwif->dma_ops->dma_end(drive);
ide_destroy_dmatable(drive); ide_destroy_dmatable(drive);
if (dma_error) { if (dma_error) {
......
...@@ -216,7 +216,6 @@ int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -216,7 +216,6 @@ int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
/* clear INTR & ERROR flags */ /* clear INTR & ERROR flags */
ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR); ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
drive->waiting_for_dma = 1;
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(ide_dma_setup); EXPORT_SYMBOL_GPL(ide_dma_setup);
...@@ -290,8 +289,6 @@ int ide_dma_end(ide_drive_t *drive) ...@@ -290,8 +289,6 @@ int ide_dma_end(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
u8 dma_stat = 0, dma_cmd = 0, mask; u8 dma_stat = 0, dma_cmd = 0, mask;
drive->waiting_for_dma = 0;
/* stop DMA */ /* stop DMA */
if (hwif->host_flags & IDE_HFLAG_MMIO) { if (hwif->host_flags & IDE_HFLAG_MMIO) {
dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
......
...@@ -91,6 +91,7 @@ ide_startstop_t ide_dma_intr(ide_drive_t *drive) ...@@ -91,6 +91,7 @@ ide_startstop_t ide_dma_intr(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
u8 stat = 0, dma_stat = 0; u8 stat = 0, dma_stat = 0;
drive->waiting_for_dma = 0;
dma_stat = hwif->dma_ops->dma_end(drive); dma_stat = hwif->dma_ops->dma_end(drive);
ide_destroy_dmatable(drive); ide_destroy_dmatable(drive);
stat = hwif->tp_ops->read_status(hwif); stat = hwif->tp_ops->read_status(hwif);
...@@ -479,6 +480,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) ...@@ -479,6 +480,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
if (error < 0) { if (error < 0) {
printk(KERN_WARNING "%s: DMA timeout error\n", drive->name); printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
drive->waiting_for_dma = 0;
(void)dma_ops->dma_end(drive); (void)dma_ops->dma_end(drive);
ide_destroy_dmatable(drive); ide_destroy_dmatable(drive);
ret = ide_error(drive, "dma timeout error", ret = ide_error(drive, "dma timeout error",
...@@ -491,6 +493,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) ...@@ -491,6 +493,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
if (dma_ops->dma_test_irq(drive) == 0) { if (dma_ops->dma_test_irq(drive) == 0) {
ide_dump_status(drive, "DMA timeout", ide_dump_status(drive, "DMA timeout",
hwif->tp_ops->read_status(hwif)); hwif->tp_ops->read_status(hwif));
drive->waiting_for_dma = 0;
(void)dma_ops->dma_end(drive); (void)dma_ops->dma_end(drive);
ide_destroy_dmatable(drive); ide_destroy_dmatable(drive);
} }
...@@ -577,5 +580,6 @@ int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -577,5 +580,6 @@ int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
ide_map_sg(drive, cmd); ide_map_sg(drive, cmd);
return 1; return 1;
} }
drive->waiting_for_dma = 1;
return 0; return 0;
} }
...@@ -207,7 +207,6 @@ static int ns87415_dma_end(ide_drive_t *drive) ...@@ -207,7 +207,6 @@ static int ns87415_dma_end(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
u8 dma_stat = 0, dma_cmd = 0; u8 dma_stat = 0, dma_cmd = 0;
drive->waiting_for_dma = 0;
dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
/* get DMA command mode */ /* get DMA command mode */
dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
......
...@@ -1517,8 +1517,6 @@ static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -1517,8 +1517,6 @@ static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
(void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
} }
drive->waiting_for_dma = 1;
return 0; return 0;
} }
...@@ -1553,7 +1551,6 @@ pmac_ide_dma_end (ide_drive_t *drive) ...@@ -1553,7 +1551,6 @@ pmac_ide_dma_end (ide_drive_t *drive)
volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
u32 dstat; u32 dstat;
drive->waiting_for_dma = 0;
dstat = readl(&dma->status); dstat = readl(&dma->status);
writel(((RUN|WAKE|DEAD) << 16), &dma->control); writel(((RUN|WAKE|DEAD) << 16), &dma->control);
......
...@@ -183,8 +183,6 @@ static int sc1200_dma_end(ide_drive_t *drive) ...@@ -183,8 +183,6 @@ static int sc1200_dma_end(ide_drive_t *drive)
outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */ outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */ outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
drive->waiting_for_dma = 0;
return (dma_stat & 7) != 4; /* verify good DMA status */ return (dma_stat & 7) != 4; /* verify good DMA status */
} }
......
...@@ -335,7 +335,7 @@ static int scc_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -335,7 +335,7 @@ static int scc_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
/* clear INTR & ERROR flags */ /* clear INTR & ERROR flags */
out_be32((void __iomem *)(hwif->dma_base + 4), dma_stat | 6); out_be32((void __iomem *)(hwif->dma_base + 4), dma_stat | 6);
drive->waiting_for_dma = 1;
return 0; return 0;
} }
...@@ -354,7 +354,6 @@ static int __scc_dma_end(ide_drive_t *drive) ...@@ -354,7 +354,6 @@ static int __scc_dma_end(ide_drive_t *drive)
ide_hwif_t *hwif = drive->hwif; ide_hwif_t *hwif = drive->hwif;
u8 dma_stat, dma_cmd; u8 dma_stat, dma_cmd;
drive->waiting_for_dma = 0;
/* get DMA command mode */ /* get DMA command mode */
dma_cmd = scc_ide_inb(hwif->dma_base); dma_cmd = scc_ide_inb(hwif->dma_base);
/* stop DMA */ /* stop DMA */
......
...@@ -258,8 +258,6 @@ static int sgiioc4_dma_end(ide_drive_t *drive) ...@@ -258,8 +258,6 @@ static int sgiioc4_dma_end(ide_drive_t *drive)
} }
} }
drive->waiting_for_dma = 0;
return dma_stat; return dma_stat;
} }
...@@ -412,7 +410,6 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive) ...@@ -412,7 +410,6 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4)); writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4));
writel(dma_direction, (void __iomem *)ioc4_dma_addr); writel(dma_direction, (void __iomem *)ioc4_dma_addr);
drive->waiting_for_dma = 1;
} }
/* IOC4 Scatter Gather list Format */ /* IOC4 Scatter Gather list Format */
......
...@@ -198,9 +198,9 @@ static int trm290_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -198,9 +198,9 @@ static int trm290_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
return 1; return 1;
outl(hwif->dmatable_dma | rw, hwif->dma_base); outl(hwif->dmatable_dma | rw, hwif->dma_base);
drive->waiting_for_dma = 1;
/* start DMA */ /* start DMA */
outw(count * 2 - 1, hwif->dma_base + 2); outw(count * 2 - 1, hwif->dma_base + 2);
return 0; return 0;
} }
...@@ -211,11 +211,7 @@ static void trm290_dma_start(ide_drive_t *drive) ...@@ -211,11 +211,7 @@ static void trm290_dma_start(ide_drive_t *drive)
static int trm290_dma_end(ide_drive_t *drive) static int trm290_dma_end(ide_drive_t *drive)
{ {
u16 status; u16 status = inw(drive->hwif->dma_base + 2);
drive->waiting_for_dma = 0;
status = inw(drive->hwif->dma_base + 2);
trm290_prepare_drive(drive, 0); trm290_prepare_drive(drive, 0);
......
...@@ -304,8 +304,6 @@ static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) ...@@ -304,8 +304,6 @@ static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
/* clear INTR & ERROR flags */ /* clear INTR & ERROR flags */
tx4939ide_clear_dma_status(base); tx4939ide_clear_dma_status(base);
drive->waiting_for_dma = 1;
tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ? tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ?
TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1); TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1);
...@@ -321,8 +319,6 @@ static int tx4939ide_dma_end(ide_drive_t *drive) ...@@ -321,8 +319,6 @@ static int tx4939ide_dma_end(ide_drive_t *drive)
void __iomem *base = TX4939IDE_BASE(hwif); void __iomem *base = TX4939IDE_BASE(hwif);
u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
drive->waiting_for_dma = 0;
/* get DMA command mode */ /* get DMA command mode */
dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd); dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd);
/* stop DMA */ /* stop DMA */
......
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