Commit 84e48b6d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge of master.kernel.org:/home/rmk/linux-2.6-rmk.git

parents 52292c9b 48af7215
......@@ -18,48 +18,30 @@
* Please select one of the following when turning on debugging.
*/
#ifdef DEBUG
#if defined(CONFIG_DEBUG_DC21285_PORT)
.macro loadsp, rb
mov \rb, #0x42000000
.endm
.macro writeb, rb
str \rb, [r3, #0x160]
.endm
#elif defined(CONFIG_DEBUG_ICEDCC)
#include <asm/arch/debug-macro.S>
#if defined(CONFIG_DEBUG_ICEDCC)
.macro loadsp, rb
.endm
.macro writeb, rb
mcr p14, 0, \rb, c0, c1, 0
.endm
#elif defined(CONFIG_FOOTBRIDGE)
.macro loadsp, rb
mov \rb, #0x7c000000
.macro writeb, ch, rb
mcr p14, 0, \ch, c0, c1, 0
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8]
#else
.macro writeb, ch, rb
senduart \ch, \rb
.endm
#elif defined(CONFIG_ARCH_RPC)
#if defined(CONFIG_FOOTBRIDGE) || \
defined(CONFIG_ARCH_RPC) || \
defined(CONFIG_ARCH_INTEGRATOR) || \
defined(CONFIG_ARCH_PXA) || \
defined(CONFIG_ARCH_IXP4XX) || \
defined(CONFIG_ARCH_IXP2000) || \
defined(CONFIG_ARCH_LH7A40X) || \
defined(CONFIG_ARCH_OMAP)
.macro loadsp, rb
mov \rb, #0x03000000
orr \rb, \rb, #0x00010000
.endm
.macro writeb, rb
strb \rb, [r3, #0x3f8 << 2]
.endm
#elif defined(CONFIG_ARCH_INTEGRATOR)
.macro loadsp, rb
mov \rb, #0x16000000
.endm
.macro writeb, rb
strb \rb, [r3, #0]
.endm
#elif defined(CONFIG_ARCH_PXA) /* Xscale-type */
.macro loadsp, rb
mov \rb, #0x40000000
orr \rb, \rb, #0x00100000
.endm
.macro writeb, rb
strb \rb, [r3, #0]
addruart \rb
.endm
#elif defined(CONFIG_ARCH_SA1100)
.macro loadsp, rb
......@@ -70,64 +52,21 @@
add \rb, \rb, #0x00010000 @ Ser1
# endif
.endm
.macro writeb, rb
str \rb, [r3, #0x14] @ UTDR
.endm
#elif defined(CONFIG_ARCH_IXP4XX)
.macro loadsp, rb
mov \rb, #0xc8000000
.endm
.macro writeb, rb
str \rb, [r3, #0]
#elif defined(CONFIG_ARCH_IXP2000)
.macro loadsp, rb
mov \rb, #0xc0000000
orr \rb, \rb, #0x00030000
.endm
.macro writeb, rb
str \rb, [r3, #0]
.endm
#elif defined(CONFIG_ARCH_LH7A40X)
.macro loadsp, rb
ldr \rb, =0x80000700 @ UART2 UARTBASE
.endm
.macro writeb, rb
strb \rb, [r3, #0]
.endm
#elif defined(CONFIG_ARCH_OMAP)
.macro loadsp, rb
mov \rb, #0xff000000 @ physical base address
add \rb, \rb, #0x00fb0000
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
add \rb, \rb, #0x00000800
#endif
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
add \rb, \rb, #0x00009000
#endif
.endm
.macro writeb, rb
strb \rb, [r3]
.endm
#elif defined(CONFIG_ARCH_IOP331)
.macro loadsp, rb
mov \rb, #0xff000000
orr \rb, \rb, #0x00ff0000
orr \rb, \rb, #0x0000f700 @ location of the UART
.endm
.macro writeb, rb
str \rb, [r3, #0]
.endm
#elif defined(CONFIG_ARCH_S3C2410)
.macro loadsp, rb
.macro loadsp, rb
mov \rb, #0x50000000
add \rb, \rb, #0x4000 * CONFIG_S3C2410_LOWLEVEL_UART_PORT
.endm
.macro writeb, rb
strb \rb, [r3, #0x20]
.endm
#else
#error no serial architecture defined
#endif
#endif
#endif
.macro kputc,val
......@@ -734,7 +673,7 @@ puts: loadsp r3
1: ldrb r2, [r0], #1
teq r2, #0
moveq pc, lr
2: writeb r2
2: writeb r2, r3
mov r1, #0x00020000
3: subs r1, r1, #1
bne 3b
......
......@@ -26,6 +26,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/arch/imxfb.h>
#include <asm/hardware.h>
#include <asm/mach/map.h>
......@@ -228,6 +229,14 @@ static struct platform_device imx_uart2_device = {
.resource = imx_uart2_resources,
};
static struct imxfb_mach_info imx_fb_info;
void __init set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info)
{
memcpy(&imx_fb_info,hard_imx_fb_info,sizeof(struct imxfb_mach_info));
}
EXPORT_SYMBOL(set_imx_fb_info);
static struct resource imxfb_resources[] = {
[0] = {
.start = 0x00205000,
......@@ -241,9 +250,16 @@ static struct resource imxfb_resources[] = {
},
};
static u64 fb_dma_mask = ~(u64)0;
static struct platform_device imxfb_device = {
.name = "imx-fb",
.id = 0,
.dev = {
.platform_data = &imx_fb_info,
.dma_mask = &fb_dma_mask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(imxfb_resources),
.resource = imxfb_resources,
};
......
......@@ -216,7 +216,9 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
write_seqlock(&xtime_lock);
// ...clear the interrupt
/*
* clear the interrupt
*/
timer1->TimerClear = 1;
timer_tick(regs);
......@@ -264,7 +266,7 @@ void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
timer1->TimerValue = timer_reload;
timer1->TimerControl = timer_ctrl;
/*
/*
* Make irqs happen for the system timer
*/
setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
......
......@@ -37,7 +37,7 @@ static void integrator_leds_event(led_event_t ledevt)
unsigned long flags;
const unsigned int dbg_base = IO_ADDRESS(INTEGRATOR_DBG_BASE);
unsigned int update_alpha_leds;
// yup, change the LEDs
local_irq_save(flags);
update_alpha_leds = 0;
......
......@@ -413,6 +413,7 @@ config CPU_BPREDICT_DISABLE
config HAS_TLS_REG
bool
depends on CPU_32v6 && !CPU_32v5 && !CPU_32v4 && !CPU_32v3
default y
help
This selects support for the CP15 thread register.
It is defined to be available on ARMv6 or later. However
......
......@@ -90,6 +90,8 @@ struct cfb_info {
*/
u_char ramdac_ctrl;
u_char ramdac_powerdown;
u32 pseudo_palette[16];
};
static char *default_font = "Acorn8x8";
......@@ -1223,9 +1225,7 @@ cyberpro_alloc_fb_info(unsigned int id, char *name)
{
struct cfb_info *cfb;
cfb = kmalloc(sizeof(struct cfb_info) +
sizeof(u32) * 16, GFP_KERNEL);
cfb = kmalloc(sizeof(struct cfb_info), GFP_KERNEL);
if (!cfb)
return NULL;
......@@ -1281,7 +1281,7 @@ cyberpro_alloc_fb_info(unsigned int id, char *name)
cfb->fb.fbops = &cyber2000fb_ops;
cfb->fb.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
cfb->fb.pseudo_palette = (void *)(cfb + 1);
cfb->fb.pseudo_palette = cfb->pseudo_palette;
fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
......
/*
* linux/include/asm-arm/arch-cl7500/vmalloc.h
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
......@@ -17,15 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
......@@ -7,15 +7,4 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x1f000000)
......@@ -8,17 +8,6 @@
#include <linux/config.h>
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#ifdef CONFIG_ARCH_FOOTBRIDGE
#define VMALLOC_END (PAGE_OFFSET + 0x30000000)
#else
......
......@@ -17,15 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
......@@ -5,17 +5,6 @@
#ifndef __ARCH_ARM_VMALLOC_H
#define __ARCH_ARM_VMALLOC_H
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
#endif
......@@ -17,16 +17,4 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_VMADDR(x) ((unsigned long)(x))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
......@@ -20,14 +20,14 @@
* * Copyright ARM Limited 1998. All rights reserved.
* ***********************************************************************/
/* ************************************************************************
*
*
* Integrator address map
*
*
* NOTE: This is a multi-hosted header file for use with uHAL and
* supported debuggers.
*
*
* $Id: platform.s,v 1.32 2000/02/18 10:51:39 asims Exp $
*
*
* ***********************************************************************/
#ifndef __address_h
......@@ -40,22 +40,22 @@
* Memory definitions
* ------------------------------------------------------------------------
* Integrator memory map
*
*
*/
#define INTEGRATOR_BOOT_ROM_LO 0x00000000
#define INTEGRATOR_BOOT_ROM_HI 0x20000000
#define INTEGRATOR_BOOT_ROM_BASE INTEGRATOR_BOOT_ROM_HI /* Normal position */
#define INTEGRATOR_BOOT_ROM_SIZE SZ_512K
/*
/*
* New Core Modules have different amounts of SSRAM, the amount of SSRAM
* fitted can be found in HDR_STAT.
*
*
* The symbol INTEGRATOR_SSRAM_SIZE is kept, however this now refers to
* the minimum amount of SSRAM fitted on any core module.
*
*
* New Core Modules also alias the SSRAM.
*
*
*/
#define INTEGRATOR_SSRAM_BASE 0x00000000
#define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
......@@ -67,9 +67,9 @@
#define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
#define INTEGRATOR_MBRD_SSRAM_SIZE SZ_512K
/*
/*
* SDRAM is a SIMM therefore the size is not known.
*
*
*/
#define INTEGRATOR_SDRAM_BASE 0x00040000
......@@ -79,9 +79,9 @@
#define INTEGRATOR_HDR2_SDRAM_BASE 0xA0000000
#define INTEGRATOR_HDR3_SDRAM_BASE 0xB0000000
/*
/*
* Logic expansion modules
*
*
*/
#define INTEGRATOR_LOGIC_MODULES_BASE 0xC0000000
#define INTEGRATOR_LOGIC_MODULE0_BASE 0xC0000000
......@@ -92,7 +92,7 @@
/* ------------------------------------------------------------------------
* Integrator header card registers
* ------------------------------------------------------------------------
*
*
*/
#define INTEGRATOR_HDR_ID_OFFSET 0x00
#define INTEGRATOR_HDR_PROC_OFFSET 0x04
......@@ -185,12 +185,12 @@
/* ------------------------------------------------------------------------
* Integrator system registers
* ------------------------------------------------------------------------
*
*
*/
/*
/*
* System Controller
*
*
*/
#define INTEGRATOR_SC_ID_OFFSET 0x00
#define INTEGRATOR_SC_OSC_OFFSET 0x04
......@@ -230,11 +230,11 @@
#define INTEGRATOR_SC_CTRL_URTS1 (1 << 6)
#define INTEGRATOR_SC_CTRL_UDTR1 (1 << 7)
/*
/*
* External Bus Interface
*
*
*/
#define INTEGRATOR_EBI_BASE 0x12000000
#define INTEGRATOR_EBI_BASE 0x12000000
#define INTEGRATOR_EBI_CSR0_OFFSET 0x00
#define INTEGRATOR_EBI_CSR1_OFFSET 0x04
......@@ -279,9 +279,9 @@
#define INTEGRATOR_KBD_BASE 0x18000000 /* Keyboard */
#define INTEGRATOR_MOUSE_BASE 0x19000000 /* Mouse */
/*
/*
* LED's & Switches
*
*
*/
#define INTEGRATOR_DBG_ALPHA_OFFSET 0x00
#define INTEGRATOR_DBG_LEDS_OFFSET 0x04
......@@ -300,7 +300,7 @@
* ------------------------------------------------------------------------
*/
/* PS2 Keyboard interface */
#define KMI0_BASE INTEGRATOR_KBD_BASE
#define KMI0_BASE INTEGRATOR_KBD_BASE
/* PS2 Mouse interface */
#define KMI1_BASE INTEGRATOR_MOUSE_BASE
......@@ -313,7 +313,7 @@
* This represents a fairly liberal usage of address space. Even though
* the V3 only has two windows (therefore we need to map stuff on the fly),
* we maintain the same addresses, even if they're not mapped.
*
*
*/
#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */
/* unused 256M from A0000000-AFFFFFFF might be used for I2O ???
......@@ -326,7 +326,7 @@
*/
#define PHYS_PCI_V3_BASE 0x62000000
#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE
#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE
/* 'export' these to UHAL */
#define UHAL_PCI_IO PCI_IO_BASE
......@@ -334,7 +334,7 @@
#define UHAL_PCI_ALLOC_IO_BASE 0x00004000
#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE
#define UHAL_PCI_MAX_SLOT 20
/* ========================================================================
* Start of uHAL definitions
* ========================================================================
......@@ -343,17 +343,17 @@
/* ------------------------------------------------------------------------
* Integrator Interrupt Controllers
* ------------------------------------------------------------------------
*
* Offsets from interrupt controller base
*
*
* Offsets from interrupt controller base
*
* System Controller interrupt controller base is
*
*
* INTEGRATOR_IC_BASE + (header_number << 6)
*
*
* Core Module interrupt controller base is
*
* INTEGRATOR_HDR_IC
*
*
* INTEGRATOR_HDR_IC
*
*/
#define IRQ_STATUS 0
#define IRQ_RAW_STATUS 0x04
......@@ -374,22 +374,22 @@
/* ------------------------------------------------------------------------
* Interrupts
* ------------------------------------------------------------------------
*
*
*
*
* Each Core Module has two interrupts controllers, one on the core module
* itself and one in the system controller on the motherboard. The
* READ_INT macro in target.s reads both interrupt controllers and returns
* a 32 bit bitmask, bits 0 to 23 are interrupts from the system controller
* and bits 24 to 31 are from the core module.
*
*
* The following definitions relate to the bitmask returned by READ_INT.
*
*
*/
/* ------------------------------------------------------------------------
* LED's - The header LED is not accessible via the uHAL API
* ------------------------------------------------------------------------
*
*
*/
#define GREEN_LED 0x01
#define YELLOW_LED 0x02
......@@ -399,44 +399,44 @@
#define LED_BANK INTEGRATOR_DBG_LEDS
/*
/*
* Memory definitions - run uHAL out of SSRAM.
*
*
*/
#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
/*
/*
* Application Flash
*
*
*/
#define FLASH_BASE INTEGRATOR_FLASH_BASE
#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
#define FLASH_BLOCK_SIZE SZ_128K
/*
/*
* Boot Flash
*
*
*/
#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI
#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE
#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
/*
/*
* Clean base - dummy
*
*
*/
#define CLEAN_BASE EPROM_BASE
/*
/*
* Timer definitions
*
*
* Only use timer 1 & 2