Commit 84b7290c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6: (55 commits)
  video: udlfb: Kill off special printk wrappers, use pr_fmt().
  video: udlfb: Kill off some magic constants for EDID sizing.
  video: udlfb: deifdefify (yes, that's a word).
  fbdev: modedb: Add a new mode for 864x480 TAAL panels.
  drivers/video/i810/i810-i2c.c: fix i2c bus handling
  video: Fix the HGA framebuffer driver
  drivers/video/carminefb.c: improve error handling
  video: imxfb: Fix the maximum value for yres
  fbdev: sh_mobile_lcdcfb: Enable 32 bpp and 24 bpp support
  fbdev: sh_mipi_dsi: use platform provided register layout and values
  ARM: mach-shmobile: specify sh7372 MIPI DSI register layout
  fbdev: sh_mipi_dsi: support different register layouts
  ARM: mach-shmobile: improve MIPI DSI clock configuration
  fbdev: sh-mobile: implement MIPI DSI runtime PM support
  sisfb: eliminate compiler warnings
  sisfb: delete unused register I/O macros
  sisfb: replace setSISIDXREG with SiS_SetRegANDOR
  sisfb: replace andSISIDXREG with SiS_SetRegAND
  sisfb: replace orSISIDXREG with SiS_SetRegOR
  sisfb: replace outSISIDXREG with SiS_SetReg
  ...
parents 9858a38e 1928e87b
......@@ -501,7 +501,12 @@ static struct platform_device keysc_device = {
static struct resource mipidsi0_resources[] = {
[0] = {
.start = 0xffc60000,
.end = 0xffc68fff,
.end = 0xffc63073,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0xffc68000,
.end = 0xffc680ef,
.flags = IORESOURCE_MEM,
},
};
......@@ -509,6 +514,7 @@ static struct resource mipidsi0_resources[] = {
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc_info.ch[0],
.vsynw_offset = 17,
};
static struct platform_device mipidsi0_device = {
......@@ -521,44 +527,6 @@ static struct platform_device mipidsi0_device = {
},
};
/* This function will disappear when we switch to (runtime) PM */
static int __init ap4evb_init_display_clk(void)
{
struct clk *lcdc_clk;
struct clk *dsitx_clk;
int ret;
lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
if (IS_ERR(lcdc_clk))
return PTR_ERR(lcdc_clk);
dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
if (IS_ERR(dsitx_clk)) {
ret = PTR_ERR(dsitx_clk);
goto eclkdsitxget;
}
ret = clk_enable(lcdc_clk);
if (ret < 0)
goto eclklcdcon;
ret = clk_enable(dsitx_clk);
if (ret < 0)
goto eclkdsitxon;
return 0;
eclkdsitxon:
clk_disable(lcdc_clk);
eclklcdcon:
clk_put(dsitx_clk);
eclkdsitxget:
clk_put(lcdc_clk);
return ret;
}
device_initcall(ap4evb_init_display_clk);
static struct platform_device *qhd_devices[] __initdata = {
&mipidsi0_device,
&keysc_device,
......@@ -764,10 +732,15 @@ static struct platform_device lcdc1_device = {
},
};
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq);
static struct sh_mobile_hdmi_info hdmi_info = {
.lcd_chan = &sh_mobile_lcdc1_info.ch[0],
.lcd_dev = &lcdc1_device.dev,
.flags = HDMI_SND_SRC_SPDIF,
.clk_optimize_parent = ap4evb_clk_optimize,
};
static struct resource hdmi_resources[] = {
......@@ -794,6 +767,25 @@ static struct platform_device hdmi_device = {
},
};
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq)
{
struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
long error;
if (IS_ERR(hdmi_ick)) {
int ret = PTR_ERR(hdmi_ick);
pr_err("Cannot get HDMI ICK: %d\n", ret);
return ret;
}
error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
clk_put(hdmi_ick);
return error;
}
static struct gpio_led ap4evb_leds[] = {
{
.name = "led4",
......
......@@ -507,7 +507,7 @@ enum { MSTP001,
MSTP223,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP_NR };
#define MSTP(_parent, _reg, _bit, _flags) \
......@@ -543,6 +543,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
[MSTP423] = MSTP(&div4_clks[DIV4_B], SMSTPCR4, 23, 0), /* DSITX1 */
[MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
[MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
[MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
......@@ -596,9 +597,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
CLKDEV_CON_ID("dsi0p_clk", &div6_clks[DIV6_DSI0P]),
CLKDEV_CON_ID("dsi1p_clk", &div6_clks[DIV6_DSI1P]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
/* MSTP32 clocks */
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
......@@ -610,7 +612,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
......@@ -633,6 +635,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
......
......@@ -111,8 +111,6 @@ source "drivers/staging/vt6655/Kconfig"
source "drivers/staging/vt6656/Kconfig"
source "drivers/staging/udlfb/Kconfig"
source "drivers/staging/hv/Kconfig"
source "drivers/staging/vme/Kconfig"
......
......@@ -38,7 +38,6 @@ obj-$(CONFIG_USB_SERIAL_QUATECH_USB2) += quatech_usb2/
obj-$(CONFIG_OCTEON_ETHERNET) += octeon/
obj-$(CONFIG_VT6655) += vt6655/
obj-$(CONFIG_VT6656) += vt6656/
obj-$(CONFIG_FB_UDL) += udlfb/
obj-$(CONFIG_HYPERV) += hv/
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_MRST_RAR_HANDLER) += memrar/
......
config FB_UDL
tristate "Displaylink USB Framebuffer support"
depends on FB && USB
select FB_MODE_HELPERS
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
---help---
This is a kernel framebuffer driver for DisplayLink USB devices.
Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
To compile as a module, choose M here: the module name is udlfb.
obj-$(CONFIG_FB_UDL) += udlfb.o
......@@ -186,6 +186,14 @@ config FB_SYS_FOPS
depends on FB
default n
config FB_WMT_GE_ROPS
tristate
depends on FB
default n
---help---
Include functions for accelerated rectangle filling and area
copying using WonderMedia Graphics Engine operations.
config FB_DEFERRED_IO
bool
depends on FB
......@@ -635,6 +643,72 @@ config FB_BFIN_LQ035Q1
To compile this driver as a module, choose M here: the
module will be called bfin-lq035q1-fb.
config FB_BF537_LQ035
tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select BFIN_GPTIMERS
help
This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
attached to a BF537.
To compile this driver as a module, choose M here: the
module will be called bf537-lq035.
config FB_BFIN_7393
tristate "Blackfin ADV7393 Video encoder"
depends on FB && BLACKFIN
select I2C
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
This is the framebuffer device for a ADV7393 video encoder
attached to a Blackfin on the PPI port.
If your Blackfin board has a ADV7393 select Y.
To compile this driver as a module, choose M here: the
module will be called bfin_adv7393fb.
choice
prompt "Video mode support"
depends on FB_BFIN_7393
default NTSC
config NTSC
bool 'NTSC 720x480'
config PAL
bool 'PAL 720x576'
config NTSC_640x480
bool 'NTSC 640x480 (Experimental)'
config PAL_640x480
bool 'PAL 640x480 (Experimental)'
config NTSC_YCBCR
bool 'NTSC 720x480 YCbCR input'
config PAL_YCBCR
bool 'PAL 720x576 YCbCR input'
endchoice
choice
prompt "Size of ADV7393 frame buffer memory Single/Double Size"
depends on (FB_BFIN_7393)
default ADV7393_1XMEM
config ADV7393_1XMEM
bool 'Single'
config ADV7393_2XMEM
bool 'Double'
endchoice
config FB_STI
tristate "HP STI frame buffer device support"
depends on FB && PARISC
......@@ -750,24 +824,14 @@ config FB_N411
config FB_HGA
tristate "Hercules mono graphics support"
depends on FB && X86
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
Say Y here if you have a Hercules mono graphics card.
To compile this driver as a module, choose M here: the
module will be called hgafb.
As this card technology is 15 years old, most people will answer N
here.
config FB_HGA_ACCEL
bool "Hercules mono Acceleration functions (EXPERIMENTAL)"
depends on FB_HGA && EXPERIMENTAL
---help---
This will compile the Hercules mono graphics with
acceleration functions.
As this card technology is at least 25 years old,
most people will answer N here.
config FB_SGIVW
tristate "SGI Visual Workstation framebuffer support"
......@@ -1722,6 +1786,24 @@ config FB_AU1200
various panels and CRTs by passing in kernel cmd line option
au1200fb:panel=<name>.
config FB_VT8500
bool "VT8500 LCD Driver"
depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_VT8500
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
This is the framebuffer driver for VIA VT8500 integrated LCD
controller.
config FB_WM8505
bool "WM8505 frame buffer support"
depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_WM8505
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
This is the framebuffer driver for WonderMedia WM8505
integrated LCD controller.
source "drivers/video/geode/Kconfig"
config FB_HIT
......@@ -2034,6 +2116,20 @@ config FB_SM501
If unsure, say N.
config FB_UDL
tristate "Displaylink USB Framebuffer support"
depends on FB && USB
select FB_MODE_HELPERS
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
---help---
This is a kernel framebuffer driver for DisplayLink USB devices.
Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
To compile as a module, choose M here: the module name is udlfb.
config FB_PNX4008_DUM
tristate "Display Update Module support on Philips PNX4008 board"
......
......@@ -26,6 +26,7 @@ obj-$(CONFIG_FB_SVGALIB) += svgalib.o
obj-$(CONFIG_FB_MACMODES) += macmodes.o
obj-$(CONFIG_FB_DDC) += fb_ddc.o
obj-$(CONFIG_FB_DEFERRED_IO) += fb_defio.o
obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
# Hardware specific drivers go first
obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
......@@ -104,6 +105,8 @@ obj-$(CONFIG_FB_W100) += w100fb.o
obj-$(CONFIG_FB_TMIO) += tmiofb.o
obj-$(CONFIG_FB_AU1100) += au1100fb.o
obj-$(CONFIG_FB_AU1200) += au1200fb.o
obj-$(CONFIG_FB_VT8500) += vt8500lcdfb.o
obj-$(CONFIG_FB_WM8505) += wm8505fb.o
obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
......@@ -122,6 +125,7 @@ obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/
obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
obj-$(CONFIG_FB_PS3) += ps3fb.o
obj-$(CONFIG_FB_SM501) += sm501fb.o
obj-$(CONFIG_FB_UDL) += udlfb.o
obj-$(CONFIG_FB_XILINX) += xilinxfb.o
obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
......@@ -141,9 +145,11 @@ obj-$(CONFIG_FB_VESA) += vesafb.o
obj-$(CONFIG_FB_EFI) += efifb.o
obj-$(CONFIG_FB_VGA16) += vga16fb.o
obj-$(CONFIG_FB_OF) += offb.o
obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
obj-$(CONFIG_FB_MX3) += mx3fb.o
obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
......
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/*
* Frame buffer driver for ADV7393/2 video encoder
*
* Copyright 2006-2009 Analog Devices Inc.
* Licensed under the GPL-2 or late.
*/
#ifndef __BFIN_ADV7393FB_H__
#define __BFIN_ADV7393FB_H__
#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
#ifdef CONFIG_NTSC
# define VMODE 0
#endif
#ifdef CONFIG_PAL
# define VMODE 1
#endif
#ifdef CONFIG_NTSC_640x480
# define VMODE 2
#endif
#ifdef CONFIG_PAL_640x480
# define VMODE 3
#endif
#ifdef CONFIG_NTSC_YCBCR
# define VMODE 4
#endif
#ifdef CONFIG_PAL_YCBCR
# define VMODE 5
#endif
#ifndef VMODE
# define VMODE 1
#endif
#ifdef CONFIG_ADV7393_2XMEM
# define VMEM 2
#else
# define VMEM 1
#endif
#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
# define DMA_CFG_VAL 0x7935 /* Set Sync Bit */
# define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START
#else
# define DMA_CFG_VAL 0x7915
# define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START
#endif
enum {
DESTRUCT,
BUILD,
};
enum {
POWER_ON,
POWER_DOWN,
BLANK_ON,
BLANK_OFF,
};
#define DRIVER_NAME "bfin-adv7393"
struct adv7393fb_modes {
const s8 name[25]; /* Full name */
u16 xres; /* Active Horizonzal Pixels */
u16 yres; /* Active Vertical Pixels */
u16 bpp;
u16 vmode;
u16 a_lines; /* Active Lines per Field */
u16 vb1_lines; /* Vertical Blanking Field 1 Lines */
u16 vb2_lines; /* Vertical Blanking Field 2 Lines */
u16 tot_lines; /* Total Lines per Frame */
u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */
u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */
const s8 *adv7393_i2c_initd;
u16 adv7393_i2c_initd_len;
};
static const u8 init_NTSC_TESTPATTERN[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
};
static const u8 init_NTSC[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
0x8F, 0x21, /* NTSC Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x20,
0x8A, 0x0d,
};
static const u8 init_PAL[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
0x8C, 0xCB, /* PAL Subcarrier Frequency */
0x8D, 0x8A, /* PAL Subcarrier Frequency */
0x8E, 0x09, /* PAL Subcarrier Frequency */
0x8F, 0x2A, /* PAL Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x20,
0x8A, 0x0d,
};
static const u8 init_NTSC_YCbCr[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
0x8F, 0x21, /* NTSC Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x08,
0x8A, 0x0d,
};
static const u8 init_PAL_YCbCr[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x8C, 0xCB, /* PAL Subcarrier Frequency */
0x8D, 0x8A, /* PAL Subcarrier Frequency */
0x8E, 0x09, /* PAL Subcarrier Frequency */
0x8F, 0x2A, /* PAL Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x08,
0x8A, 0x0d,
};
static struct adv7393fb_modes known_modes[] = {
/* NTSC 720x480 CRT */
{
.name = "NTSC 720x480",
.xres = 720,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 240,
.vb1_lines = 22,
.vb2_lines = 23,
.tot_lines = 525,
.boeft_blank = 16,
.aoeft_blank = 122,
.adv7393_i2c_initd = init_NTSC,
.adv7393_i2c_initd_len = sizeof(init_NTSC)
},
/* PAL 720x480 CRT */
{
.name = "PAL 720x576",
.xres = 720,
.yres = 576,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 288,
.vb1_lines = 24,
.vb2_lines = 25,
.tot_lines = 625,
.boeft_blank = 12,
.aoeft_blank = 132,
.adv7393_i2c_initd = init_PAL,
.adv7393_i2c_initd_len = sizeof(init_PAL)
},
/* NTSC 640x480 CRT Experimental */
{
.name = "NTSC 640x480",
.xres = 640,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 240,
.vb1_lines = 22,
.vb2_lines = 23,
.tot_lines = 525,
.boeft_blank = 16 + 40,
.aoeft_blank = 122 + 40,
.adv7393_i2c_initd = init_NTSC,
.adv7393_i2c_initd_len = sizeof(init_NTSC)
},
/* PAL 640x480 CRT Experimental */
{
.name = "PAL 640x480",
.xres = 640,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 288 - 20,
.vb1_lines = 24 + 20,
.vb2_lines = 25 + 20,
.tot_lines = 625,
.boeft_blank = 12 + 40,
.aoeft_blank = 132 + 40,
.adv7393_i2c_initd = init_PAL,
.adv7393_i2c_initd_len = sizeof(init_PAL)