Commit 83ef3338 authored by Hans J. Koch's avatar Hans J. Koch Committed by Thomas Gleixner

ARM: Introduce plat-tcc

This patch introduces support for the tcc platform by creating an
arch/arm/plat-tcc and arch/arm/mach-tcc8k directories and adding
basic include files plus Kconfig and Makefile.
Signed-off-by: default avatar"Hans J. Koch" <hjk@linutronix.de>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 509344b8
......@@ -748,6 +748,15 @@ config ARCH_SHARK
Support for the StrongARM based Digital DNARD machine, also known
as "Shark" (<http://www.shark-linux.de/shark.html>).
config ARCH_TCC_926
bool "Telechips TCC ARM926-based systems"
select CPU_ARM926T
select HAVE_CLK
select COMMON_CLKDEV
select GENERIC_CLOCKEVENTS
help
Support for Telechips TCC ARM926-based systems.
config ARCH_LH7A40X
bool "Sharp LH7A40X"
select CPU_ARM922T
......@@ -916,6 +925,8 @@ source "arch/arm/plat-s5p/Kconfig"
source "arch/arm/plat-spear/Kconfig"
source "arch/arm/plat-tcc/Kconfig"
if ARCH_S3C2410
source "arch/arm/mach-s3c2400/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig"
......
......@@ -183,6 +183,7 @@ machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
machine-$(CONFIG_ARCH_STMP378X) := stmp378x
machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
machine-$(CONFIG_ARCH_TCC8K) := tcc8k
machine-$(CONFIG_ARCH_TEGRA) := tegra
machine-$(CONFIG_ARCH_U300) := u300
machine-$(CONFIG_ARCH_U8500) := ux500
......@@ -202,6 +203,7 @@ plat-$(CONFIG_ARCH_MXC) := mxc
plat-$(CONFIG_ARCH_OMAP) := omap
plat-$(CONFIG_ARCH_S3C64XX) := samsung
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
plat-$(CONFIG_ARCH_TCC_926) := tcc
plat-$(CONFIG_PLAT_IOP) := iop
plat-$(CONFIG_PLAT_NOMADIK) := nomadik
plat-$(CONFIG_PLAT_ORION) := orion
......
if ARCH_TCC8K
comment "TCC8000 systems:"
endif
if ARCH_TCC_926
menu "Telechips ARM926-based CPUs"
choice
prompt "Telechips CPU type:"
default ARCH_TCC8K
config ARCH_TCC8K
bool TCC8000
select USB_ARCH_HAS_OHCI
help
Support for Telechips TCC8000 systems
endchoice
source "arch/arm/mach-tcc8k/Kconfig"
endmenu
endif
# "Telechips Platform Common Modules"
obj-y := system.o
/*
* Copyright (C) 1994-1999 Russell King
* Copyright (C) 2008-2009 Telechips
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro addruart,rx,tmp
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x90000000 @ physical base address
movne \rx, #0xF1000000 @ virtual base
orr \rx, \rx, #0x00007000 @ UART0
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #0x44]
.endm
.macro waituart,rd,rx
.endm
.macro busyuart,rd,rx
1001:
ldr \rd, [\rx, #0x14]
tst \rd, #0x20
beq 1001b
.endm
/*
* include/asm-arm/arch-tcc83x/entry-macro.S
*
* Author : <linux@telechips.com>
* Created: June 10, 2008
* Description: Low-level IRQ helper macros for Telechips-based platforms
*
* Copyright (C) 2008-2009 Telechips
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <mach/hardware.h>
#include <mach/irqs.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =0xF2003000 @ base address of PIC registers
@@ read MREQ register of PIC0
mov \irqnr, #0
ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
cmp \irqstat, #0
bne 1001f
@@ read MREQ register of PIC1
ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
cmp \irqstat, #0
beq 1002f
mov \irqnr, #0x20
1001:
movs \tmp, \irqstat, lsl #16
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #16
movs \tmp, \irqstat, lsl #8
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #8
movs \tmp, \irqstat, lsl #4
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #4
movs \tmp, \irqstat, lsl #2
movne \irqstat, \tmp
addeq \irqnr, \irqnr, #2
movs \tmp, \irqstat, lsl #1
addeq \irqnr, \irqnr, #1
orrs \base, \base, #1
1002:
@@ exit here, Z flag unset if IRQ
.endm
/*
* Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
* Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
* and Dirk Behme <dirk.behme@de.bosch.com>
* Rewritten by: <linux@telechips.com>
* Description: Hardware definitions for TCC8300 processors and boards
*
* Copyright (C) 2001 RidgeRun, Inc.
* Copyright (C) 2008-2009 Telechips
*
* Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GNU Pulic License version 2.
*/
#ifndef __ASM_ARCH_TCC_HARDWARE_H
#define __ASM_ARCH_TCC_HARDWARE_H
#include <asm/sizes.h>
#ifndef __ASSEMBLER__
#include <asm/types.h>
#endif
#include <mach/io.h>
/*
* ----------------------------------------------------------------------------
* Clocks
* ----------------------------------------------------------------------------
*/
#define CLKGEN_REG_BASE 0xfffece00
#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
/* DPLL control registers */
#define DPLL_CTL 0xfffecf00
#endif /* __ASM_ARCH_TCC_HARDWARE_H */
/*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 RidgeRun, Inc.
* Copyright (C) 2008-2009 Telechips
* Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GPL v2.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x20000000)
#endif
/*
* Author: <linux@telechips.com>
* Created: June 10, 2008
* Description: LINUX SYSTEM FUNCTIONS for TCC83x
*
* Copyright (C) 2008-2009 Telechips
*
* Licensed under the terms of the GPL v2.
*
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <linux/clk.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
extern void plat_tcc_reboot(void);
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode, const char *cmd)
{
plat_tcc_reboot();
}
#endif
This diff is collapsed.
/*
* Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
*
* This file is licensed under the terms of the GPL version 2.
*/
#include <linux/serial_reg.h>
#include <linux/types.h>
#include <mach/tcc8k-regs.h>
unsigned int system_rev;
#define ID_MASK 0x7fff
static void putc(int c)
{
u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
while (!(*uart_lsr & UART_LSR_THRE))
barrier();
*uart_tx = c;
}
static inline void flush(void)
{
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()
/*
* Author: <linux@telechips.com>
* Created: June 10, 2008
*
* Copyright (C) 2000 Russell King.
* Copyright (C) 2008-2009 Telechips
*
* Licensed under the terms of the GPL v2.
*/
#define VMALLOC_END 0xf0000000UL
/*
* System functions for Telechips TCCxxxx SoCs
*
* Copyright (C) Hans J. Koch <hjk@linutronix.de>
*
* Licensed under the terms of the GPL v2.
*
*/
#include <linux/io.h>
#include <mach/tcc8k-regs.h>
/* System reboot */
void plat_tcc_reboot(void)
{
/* Make sure clocks are on */
__raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
/* Enable watchdog reset */
__raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
/* Wait for reset */
while(1)
;
}
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment