Commit 83014579 authored by Kukjin Kim's avatar Kukjin Kim
Browse files

ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos



The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.

This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent e700e41d
......@@ -837,8 +837,8 @@ config ARCH_S5PV210
help
Samsung S5PV210/S5PC110 series based systems
config ARCH_EXYNOS4
bool "Samsung EXYNOS4"
config ARCH_EXYNOS
bool "SAMSUNG EXYNOS"
select CPU_V7
select ARCH_SPARSEMEM_ENABLE
select ARCH_HAS_HOLES_MEMORYMODEL
......@@ -852,7 +852,7 @@ config ARCH_EXYNOS4
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
help
Samsung EXYNOS4 series based systems
Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
config ARCH_SHARK
bool "Shark"
......@@ -1079,7 +1079,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig"
source "arch/arm/mach-exynos4/Kconfig"
source "arch/arm/mach-exynos/Kconfig"
source "arch/arm/mach-shmobile/Kconfig"
......
......@@ -180,7 +180,7 @@ machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
machine-$(CONFIG_ARCH_EXYNOS4) := exynos4
machine-$(CONFIG_ARCH_EXYNOS4) := exynos
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
......
......@@ -4,19 +4,18 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARCH_EXYNOS=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_MACH_SMDKC210=y
CONFIG_MACH_SMDKV310=y
CONFIG_MACH_ARMLEX4210=y
CONFIG_MACH_UNIVERSAL_C210=y
CONFIG_MACH_NURI=y
CONFIG_MACH_ORIGEN=y
CONFIG_MACH_SMDK4412=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_HOTPLUG_CPU=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
......@@ -61,13 +60,9 @@ CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_SPINLOCK_SLEEP=y
CONFIG_DEBUG_INFO=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_S3C_UART=1
CONFIG_CRC_CCITT=y
# arch/arm/mach-exynos4/Kconfig
# arch/arm/mach-exynos/Kconfig
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
......@@ -7,10 +7,27 @@
# Configuration options for the EXYNOS4
if ARCH_EXYNOS4
if ARCH_EXYNOS
menu "SAMSUNG EXYNOS SoCs Support"
choice
prompt "EXYNOS System Type"
default ARCH_EXYNOS4
config ARCH_EXYNOS4
bool "SAMSUNG EXYNOS4"
help
Samsung EXYNOS4 SoCs based systems
endchoice
comment "EXYNOS SoCs"
config CPU_EXYNOS4210
bool
bool "SAMSUNG EXYNOS4210"
default y
depends on ARCH_EXYNOS4
select SAMSUNG_DMADEV
select ARM_CPU_SUSPEND if PM
select S5P_PM if PM
......@@ -19,15 +36,18 @@ config CPU_EXYNOS4210
Enable EXYNOS4210 CPU support
config SOC_EXYNOS4212
bool
select ARM_CPU_SUSPEND if PM
bool "SAMSUNG EXYNOS4212"
default y
depends on ARCH_EXYNOS4
select S5P_PM if PM
select S5P_SLEEP if PM
help
Enable EXYNOS4212 SoC support
config SOC_EXYNOS4412
bool
bool "SAMSUNG EXYNOS4412"
default y
depends on ARCH_EXYNOS4
help
Enable EXYNOS4412 SoC support
......@@ -125,7 +145,7 @@ config EXYNOS4_SETUP_USB_PHY
# machine support
menu "EXYNOS4 Machines"
if ARCH_EXYNOS4
comment "EXYNOS4210 Boards"
......@@ -305,12 +325,11 @@ config MACH_SMDK4412
select MACH_SMDK4212
help
Machine support for Samsung SMDK4412
endif
endmenu
comment "Configuration for HSMMC bus width"
if ARCH_EXYNOS4
menu "Use 8-bit bus width"
comment "Configuration for HSMMC 8-bit bus width"
config EXYNOS4_SDHCI_CH0_8BIT
bool "Channel 0 with 8-bit bus"
......@@ -323,6 +342,7 @@ config EXYNOS4_SDHCI_CH2_8BIT
help
Support HSMMC Channel 2 8-bit bus.
If selected, Channel 3 is disabled.
endif
endmenu
......
# arch/arm/mach-exynos4/Makefile
# arch/arm/mach-exynos/Makefile
#
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/
......@@ -12,8 +12,8 @@ obj- :=
# Core support for EXYNOS4 system
obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o
obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o irq-eint.o dma.o pmu.o
obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o
obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o dma.o pmu.o
obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
obj-$(CONFIG_PM) += pm.o
......@@ -39,11 +39,11 @@ obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o
# device support
obj-y += dev-audio.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
......@@ -57,5 +57,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o
/* linux/arch/arm/mach-exynos4/cpu.c
/* linux/arch/arm/mach-exynos/cpu.c
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
......@@ -40,27 +40,46 @@ extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
/* Initial IO mappings */
static struct map_desc exynos4_iodesc[] __initdata = {
static struct map_desc exynos_iodesc[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_SYSTIMER,
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
.pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_CMU,
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_PMU,
.pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
.pfn = __phys_to_pfn(EXYNOS_PA_PMU),
.length = SZ_64K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
.pfn = __phys_to_pfn(EXYNOS_PA_COMBINER),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GIC_CPU,
.pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
.length = SZ_64K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GIC_DIST,
.pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
.length = SZ_64K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S3C_VA_UART,
.pfn = __phys_to_pfn(S3C_PA_UART),
.length = SZ_512K,
.type = MT_DEVICE,
},
};
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_CMU,
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
.length = SZ_128K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
......@@ -91,11 +110,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S3C_VA_UART,
.pfn = __phys_to_pfn(S3C_PA_UART),
.length = SZ_512K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
......@@ -106,16 +120,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GIC_CPU,
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
.length = SZ_64K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GIC_DIST,
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
.length = SZ_64K,
.type = MT_DEVICE,
},
};
......@@ -137,7 +141,7 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
},
};
static void exynos4_idle(void)
static void exynos_idle(void)
{
if (!need_resched())
cpu_do_idle();
......@@ -151,12 +155,13 @@ static void exynos4_sw_reset(void)
}
/*
* exynos4_map_io
* exynos_map_io
*
* register the standard cpu IO areas
*/
void __init exynos4_map_io(void)
{
iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
......@@ -250,7 +255,6 @@ static int __init exynos4_core_init(void)
{
return sysdev_class_register(&exynos4_sysclass);
}
core_initcall(exynos4_core_init);
#ifdef CONFIG_CACHE_L2X0
......@@ -279,15 +283,16 @@ static int __init exynos4_l2x0_cache_init(void)
early_initcall(exynos4_l2x0_cache_init);
#endif
int __init exynos4_init(void)
int __init exynos_init(void)
{
printk(KERN_INFO "EXYNOS4: Initializing architecture\n");
printk(KERN_INFO "EXYNOS: Initializing architecture\n");
/* set idle function */
pm_idle = exynos4_idle;
pm_idle = exynos_idle;
/* set sw_reset function */
s5p_reset_hook = exynos4_sw_reset;
if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
s5p_reset_hook = exynos4_sw_reset;
return sysdev_register(&exynos4_sysdev);
}
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