Commit 803dedb6 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
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[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly



Apart from that the current code doesn't compile it's also
meaningless with regard to the MPC8568E-MDS' BCSR.

This patch used to reset UCCs properly.
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent af6521ea
...@@ -113,18 +113,22 @@ static void __init mpc85xx_mds_setup_arch(void) ...@@ -113,18 +113,22 @@ static void __init mpc85xx_mds_setup_arch(void)
} }
if (bcsr_regs) { if (bcsr_regs) {
u8 bcsr_phy; #define BCSR_UCC1_GETH_EN (0x1 << 7)
#define BCSR_UCC2_GETH_EN (0x1 << 7)
/* Reset the Ethernet PHY */ #define BCSR_UCC1_MODE_MSK (0x3 << 4)
bcsr_phy = in_be8(&bcsr_regs[9]); #define BCSR_UCC2_MODE_MSK (0x3 << 0)
bcsr_phy &= ~0x20;
out_be8(&bcsr_regs[9], bcsr_phy); /* Turn off UCC1 & UCC2 */
clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
udelay(1000); clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
bcsr_phy = in_be8(&bcsr_regs[9]); /* Mode is RGMII, all bits clear */
bcsr_phy |= 0x20; clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
out_be8(&bcsr_regs[9], bcsr_phy); BCSR_UCC2_MODE_MSK);
/* Turn UCC1 & UCC2 on */
setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
iounmap(bcsr_regs); iounmap(bcsr_regs);
} }
......
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