Commit 6b9c6768 authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
Browse files

[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size



According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M

Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent c0e4eb2d
......@@ -226,8 +226,8 @@
interrupt-parent = <&mpic>;
interrupts = <1a 2>;
bus-range = <0 ff>;
ranges = <02000000 0 a0000000 a0000000 0 20000000
01000000 0 00000000 e3000000 0 08000000>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
01000000 0 00000000 e2800000 0 00800000>;
clock-frequency = <1fca055>;
#interrupt-cells = <1>;
#size-cells = <2>;
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment