Commit 67605613 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6

* 'release' of git://lm-sensors.org/kernel/mhoffman/hwmon-2.6:
  hwmon: needs new maintainer
  hwmon: (lm85) Simplify device initialization function
  hwmon: (lm85) Misc cleanups
  hwmon: (lm85) Don't write back cached values
  hwmon: (lm85) Drop dead code
  hwmon: (lm85) Coding-style cleanups
  hwmon: (lm75) add new-style driver binding
  hwmon: (lm75) cleanup/reorg
  hwmon: (adt7473) clarify an awkward bit of code
  hwmon: (adt7473) Remove unused defines
  hwmon: (dme1737) fix voltage scaling
  hwmon: (dme1737) probe all addresses
  hwmon: (dme1737) demacrofy for readability
parents 623fa579 47d715af
......@@ -22,6 +22,10 @@ Module Parameters
and PWM output control functions. Using this parameter
shouldn't be required since the BIOS usually takes care
of this.
* probe_all_addr: bool Include non-standard LPC addresses 0x162e and 0x164e
when probing for ISA devices. This is required for the
following boards:
- VIA EPIA SN18000
Note that there is no need to use this parameter if the driver loads without
complaining. The driver will say so if it is necessary.
......
......@@ -96,11 +96,6 @@ initial testing of the ADM1027 it was 1.00 degC steps. Analog Devices has
confirmed this "bug". The ADT7463 is reported to work as described in the
documentation. The current lm85 driver does not show the offset register.
The ADT7463 has a THERM asserted counter. This counter has a 22.76ms
resolution and a range of 5.8 seconds. The driver implements a 32-bit
accumulator of the counter value to extend the range to over a year. The
counter will stay at it's max value until read.
See the vendor datasheets for more information. There is application note
from National (AN-1260) with some additional information about the LM85.
The Analog Devices datasheet is very detailed and describes a procedure for
......@@ -206,13 +201,15 @@ Configuration choices:
The National LM85's have two vendor specific configuration
features. Tach. mode and Spinup Control. For more details on these,
see the LM85 datasheet or Application Note AN-1260.
see the LM85 datasheet or Application Note AN-1260. These features
are not currently supported by the lm85 driver.
The Analog Devices ADM1027 has several vendor specific enhancements.
The number of pulses-per-rev of the fans can be set, Tach monitoring
can be optimized for PWM operation, and an offset can be applied to
the temperatures to compensate for systemic errors in the
measurements.
measurements. These features are not currently supported by the lm85
driver.
In addition to the ADM1027 features, the ADT7463 also has Tmin control
and THERM asserted counts. Automatic Tmin control acts to adjust the
......
......@@ -1878,13 +1878,9 @@ W: http://gigaset307x.sourceforge.net/
S: Maintained
HARDWARE MONITORING
P: Mark M. Hoffman
M: mhoffman@lightlink.com
L: lm-sensors@lm-sensors.org
W: http://www.lm-sensors.org/
T: git lm-sensors.org:/kernel/mhoffman/hwmon-2.6.git testing
T: git lm-sensors.org:/kernel/mhoffman/hwmon-2.6.git release
S: Maintained
S: Orphaned
HARDWARE RANDOM NUMBER GENERATOR CORE
S: Orphaned
......
......@@ -394,13 +394,24 @@ config SENSORS_LM75
tristate "National Semiconductor LM75 and compatibles"
depends on I2C
help
If you say yes here you get support for National Semiconductor LM75
sensor chips and clones: Dallas Semiconductor DS75 and DS1775 (in
9-bit precision mode), and TelCom (now Microchip) TCN75.
The DS75 and DS1775 in 10- to 12-bit precision modes will require
a force module parameter. The driver will not handle the extra
precision anyhow.
If you say yes here you get support for one common type of
temperature sensor chip, with models including:
- Dallas Semiconductor DS75 and DS1775
- Maxim MAX6625 and MAX6626
- Microchip MCP980x
- National Semiconductor LM75
- NXP's LM75A
- ST Microelectronics STDS75
- TelCom (now Microchip) TCN75
- Texas Instruments TMP100, TMP101, TMP75, TMP175, TMP275
This driver supports driver model based binding through board
specific I2C device tables.
It also supports the "legacy" style of driver binding. To use
that with some chips which don't replicate LM75 quirks exactly,
you may need the "force" module parameter.
This driver can also be built as a module. If so, the module
will be called lm75.
......
......@@ -39,32 +39,20 @@ I2C_CLIENT_INSMOD_1(adt7473);
#define ADT7473_REG_BASE_ADDR 0x20
#define ADT7473_REG_VOLT_BASE_ADDR 0x21
#define ADT7473_REG_VOLT_MAX_ADDR 0x22
#define ADT7473_REG_VOLT_MIN_BASE_ADDR 0x46
#define ADT7473_REG_VOLT_MIN_MAX_ADDR 0x49
#define ADT7473_REG_TEMP_BASE_ADDR 0x25
#define ADT7473_REG_TEMP_MAX_ADDR 0x27
#define ADT7473_REG_TEMP_LIMITS_BASE_ADDR 0x4E
#define ADT7473_REG_TEMP_LIMITS_MAX_ADDR 0x53
#define ADT7473_REG_TEMP_TMIN_BASE_ADDR 0x67
#define ADT7473_REG_TEMP_TMIN_MAX_ADDR 0x69
#define ADT7473_REG_TEMP_TMAX_BASE_ADDR 0x6A
#define ADT7473_REG_TEMP_TMAX_MAX_ADDR 0x6C
#define ADT7473_REG_FAN_BASE_ADDR 0x28
#define ADT7473_REG_FAN_MAX_ADDR 0x2F
#define ADT7473_REG_FAN_MIN_BASE_ADDR 0x54
#define ADT7473_REG_FAN_MIN_MAX_ADDR 0x5B
#define ADT7473_REG_PWM_BASE_ADDR 0x30
#define ADT7473_REG_PWM_MAX_ADDR 0x32
#define ADT7473_REG_PWM_MIN_BASE_ADDR 0x64
#define ADT7473_REG_PWM_MIN_MAX_ADDR 0x66
#define ADT7473_REG_PWM_MAX_BASE_ADDR 0x38
#define ADT7473_REG_PWM_MAX_MAX_ADDR 0x3A
#define ADT7473_REG_PWM_BHVR_BASE_ADDR 0x5C
#define ADT7473_REG_PWM_BHVR_MAX_ADDR 0x5E
#define ADT7473_PWM_BHVR_MASK 0xE0
#define ADT7473_PWM_BHVR_SHIFT 5
......@@ -102,7 +90,6 @@ I2C_CLIENT_INSMOD_1(adt7473);
#define ADT7473_FAN4_ALARM 0x20
#define ADT7473_R1T_SHORT 0x40
#define ADT7473_R2T_SHORT 0x80
#define ADT7473_REG_MAX_ADDR 0x80
#define ALARM2(x) ((x) << 8)
......@@ -583,10 +570,9 @@ static ssize_t set_max_duty_at_crit(struct device *dev,
struct i2c_client *client = to_i2c_client(dev);
struct adt7473_data *data = i2c_get_clientdata(client);
int temp = simple_strtol(buf, NULL, 10);
temp = temp && 0xFF;
mutex_lock(&data->lock);
data->max_duty_at_overheat = temp;
data->max_duty_at_overheat = !!temp;
reg = i2c_smbus_read_byte_data(client, ADT7473_REG_CFG4);
if (temp)
reg |= ADT7473_CFG4_MAX_DUTY_AT_OVT;
......
......@@ -48,6 +48,11 @@ static unsigned short force_id;
module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
static int probe_all_addr;
module_param(probe_all_addr, bool, 0);
MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC "
"addresses");
/* Addresses to scan */
static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
......@@ -176,6 +181,7 @@ struct dme1737_data {
int valid; /* !=0 if following fields are valid */
unsigned long last_update; /* in jiffies */
unsigned long last_vbat; /* in jiffies */
enum chips type;
u8 vid;
u8 pwm_rr_en;
......@@ -210,20 +216,27 @@ struct dme1737_data {
};
/* Nominal voltage values */
static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
3300};
static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
3300};
#define IN_NOMINAL(ix, type) (((type) == dme1737) ? \
IN_NOMINAL_DME1737[(ix)] : \
IN_NOMINAL_SCH311x[(ix)])
/* Voltage input
* Voltage inputs have 16 bits resolution, limit values have 8 bits
* resolution. */
static inline int IN_FROM_REG(int reg, int ix, int res)
static inline int IN_FROM_REG(int reg, int ix, int res, int type)
{
return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
return (reg * IN_NOMINAL(ix, type) + (3 << (res - 3))) /
(3 << (res - 2));
}
static inline int IN_TO_REG(int val, int ix)
static inline int IN_TO_REG(int val, int ix, int type)
{
return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
IN_NOMINAL[ix], 0, 255);
return SENSORS_LIMIT((val * 192 + IN_NOMINAL(ix, type) / 2) /
IN_NOMINAL(ix, type), 0, 255);
}
/* Temperature input
......@@ -722,13 +735,13 @@ static ssize_t show_in(struct device *dev, struct device_attribute *attr,
switch (fn) {
case SYS_IN_INPUT:
res = IN_FROM_REG(data->in[ix], ix, 16);
res = IN_FROM_REG(data->in[ix], ix, 16, data->type);
break;
case SYS_IN_MIN:
res = IN_FROM_REG(data->in_min[ix], ix, 8);
res = IN_FROM_REG(data->in_min[ix], ix, 8, data->type);
break;
case SYS_IN_MAX:
res = IN_FROM_REG(data->in_max[ix], ix, 8);
res = IN_FROM_REG(data->in_max[ix], ix, 8, data->type);
break;
case SYS_IN_ALARM:
res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
......@@ -755,12 +768,12 @@ static ssize_t set_in(struct device *dev, struct device_attribute *attr,
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_IN_MIN:
data->in_min[ix] = IN_TO_REG(val, ix);
data->in_min[ix] = IN_TO_REG(val, ix, data->type);
dme1737_write(client, DME1737_REG_IN_MIN(ix),
data->in_min[ix]);
break;
case SYS_IN_MAX:
data->in_max[ix] = IN_TO_REG(val, ix);
data->in_max[ix] = IN_TO_REG(val, ix, data->type);
dme1737_write(client, DME1737_REG_IN_MAX(ix),
data->in_max[ix]);
break;
......@@ -1501,9 +1514,9 @@ SENSOR_DEVICE_ATTR_PWM_1TO3(3);
/* PWMs 5-6 */
#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
......@@ -1517,91 +1530,75 @@ static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
#define SENSOR_DEV_ATTR_IN(ix) \
&sensor_dev_attr_in##ix##_input.dev_attr.attr, \
&sensor_dev_attr_in##ix##_min.dev_attr.attr, \
&sensor_dev_attr_in##ix##_max.dev_attr.attr, \
&sensor_dev_attr_in##ix##_alarm.dev_attr.attr
/* These attributes are read-writeable only if the chip is *not* locked */
#define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
&sensor_dev_attr_temp##ix##_offset.dev_attr.attr
#define SENSOR_DEV_ATTR_TEMP(ix) \
SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
&sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
&sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
&sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
&sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
&sensor_dev_attr_temp##ix##_fault.dev_attr.attr
/* These attributes are read-writeable only if the chip is *not* locked */
#define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
&sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
&sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
&sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
&sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
#define SENSOR_DEV_ATTR_ZONE(ix) \
SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
&sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
#define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_type.dev_attr.attr
#define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
&sensor_dev_attr_fan##ix##_max.dev_attr.attr
/* These attributes are read-writeable only if the chip is *not* locked */
#define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
#define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
&sensor_dev_attr_pwm##ix.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
/* These attributes are read-writeable only if the chip is *not* locked */
#define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
&sensor_dev_attr_pwm##ix.dev_attr.attr, \
&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
#define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
/* This struct holds all the attributes that are always present and need to be
* created unconditionally. The attributes that need modification of their
* permissions are created read-only and write permissions are added or removed
* on the fly when required */
static struct attribute *dme1737_attr[] ={
/* Voltages */
SENSOR_DEV_ATTR_IN(0),
SENSOR_DEV_ATTR_IN(1),
SENSOR_DEV_ATTR_IN(2),
SENSOR_DEV_ATTR_IN(3),
SENSOR_DEV_ATTR_IN(4),
SENSOR_DEV_ATTR_IN(5),
SENSOR_DEV_ATTR_IN(6),
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in0_max.dev_attr.attr,
&sensor_dev_attr_in0_alarm.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
&sensor_dev_attr_in1_max.dev_attr.attr,
&sensor_dev_attr_in1_alarm.dev_attr.attr,
&sensor_dev_attr_in2_input.dev_attr.attr,
&sensor_dev_attr_in2_min.dev_attr.attr,
&sensor_dev_attr_in2_max.dev_attr.attr,
&sensor_dev_attr_in2_alarm.dev_attr.attr,
&sensor_dev_attr_in3_input.dev_attr.attr,
&sensor_dev_attr_in3_min.dev_attr.attr,
&sensor_dev_attr_in3_max.dev_attr.attr,
&sensor_dev_attr_in3_alarm.dev_attr.attr,
&sensor_dev_attr_in4_input.dev_attr.attr,
&sensor_dev_attr_in4_min.dev_attr.attr,
&sensor_dev_attr_in4_max.dev_attr.attr,
&sensor_dev_attr_in4_alarm.dev_attr.attr,
&sensor_dev_attr_in5_input.dev_attr.attr,
&sensor_dev_attr_in5_min.dev_attr.attr,
&sensor_dev_attr_in5_max.dev_attr.attr,
&sensor_dev_attr_in5_alarm.dev_attr.attr,
&sensor_dev_attr_in6_input.dev_attr.attr,
&sensor_dev_attr_in6_min.dev_attr.attr,
&sensor_dev_attr_in6_max.dev_attr.attr,
&sensor_dev_attr_in6_alarm.dev_attr.attr,
/* Temperatures */
SENSOR_DEV_ATTR_TEMP(1),
SENSOR_DEV_ATTR_TEMP(2),
SENSOR_DEV_ATTR_TEMP(3),
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_alarm.dev_attr.attr,
&sensor_dev_attr_temp1_fault.dev_attr.attr,
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_temp2_min.dev_attr.attr,
&sensor_dev_attr_temp2_max.dev_attr.attr,
&sensor_dev_attr_temp2_alarm.dev_attr.attr,
&sensor_dev_attr_temp2_fault.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp3_input.dev_attr.attr,
&sensor_dev_attr_temp3_min.dev_attr.attr,
&sensor_dev_attr_temp3_max.dev_attr.attr,
&sensor_dev_attr_temp3_alarm.dev_attr.attr,
&sensor_dev_attr_temp3_fault.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
/* Zones */
SENSOR_DEV_ATTR_ZONE(1),
SENSOR_DEV_ATTR_ZONE(2),
SENSOR_DEV_ATTR_ZONE(3),
&sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
/* Misc */
&dev_attr_vrm.attr,
&dev_attr_cpu0_vid.attr,
......@@ -1616,23 +1613,48 @@ static const struct attribute_group dme1737_group = {
* Their creation depends on the chip configuration which is determined during
* module load. */
static struct attribute *dme1737_attr_pwm1[] = {
SENSOR_DEV_ATTR_PWM_1TO3(1),
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm2[] = {
SENSOR_DEV_ATTR_PWM_1TO3(2),
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm3[] = {
SENSOR_DEV_ATTR_PWM_1TO3(3),
&sensor_dev_attr_pwm3.dev_attr.attr,
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm5[] = {
SENSOR_DEV_ATTR_PWM_5TO6(5),
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_freq.dev_attr.attr,
&sensor_dev_attr_pwm5_enable.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm6[] = {
SENSOR_DEV_ATTR_PWM_5TO6(6),
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_freq.dev_attr.attr,
&sensor_dev_attr_pwm6_enable.dev_attr.attr,
NULL
};
......@@ -1649,27 +1671,45 @@ static const struct attribute_group dme1737_pwm_group[] = {
* Their creation depends on the chip configuration which is determined during
* module load. */
static struct attribute *dme1737_attr_fan1[] = {
SENSOR_DEV_ATTR_FAN_1TO4(1),
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_min.dev_attr.attr,
&sensor_dev_attr_fan1_alarm.dev_attr.attr,
&sensor_dev_attr_fan1_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_fan2[] = {
SENSOR_DEV_ATTR_FAN_1TO4(2),
&sensor_dev_attr_fan2_input.dev_attr.attr,
&sensor_dev_attr_fan2_min.dev_attr.attr,
&sensor_dev_attr_fan2_alarm.dev_attr.attr,
&sensor_dev_attr_fan2_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_fan3[] = {
SENSOR_DEV_ATTR_FAN_1TO4(3),
&sensor_dev_attr_fan3_input.dev_attr.attr,
&sensor_dev_attr_fan3_min.dev_attr.attr,
&sensor_dev_attr_fan3_alarm.dev_attr.attr,
&sensor_dev_attr_fan3_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_fan4[] = {
SENSOR_DEV_ATTR_FAN_1TO4(4),
&sensor_dev_attr_fan4_input.dev_attr.attr,
&sensor_dev_attr_fan4_min.dev_attr.attr,
&sensor_dev_attr_fan4_alarm.dev_attr.attr,
&sensor_dev_attr_fan4_type.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_fan5[] = {
SENSOR_DEV_ATTR_FAN_5TO6(5),
&sensor_dev_attr_fan5_input.dev_attr.attr,
&sensor_dev_attr_fan5_min.dev_attr.attr,
&sensor_dev_attr_fan5_alarm.dev_attr.attr,
&sensor_dev_attr_fan5_max.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_fan6[] = {
SENSOR_DEV_ATTR_FAN_5TO6(6),
&sensor_dev_attr_fan6_input.dev_attr.attr,
&sensor_dev_attr_fan6_min.dev_attr.attr,
&sensor_dev_attr_fan6_alarm.dev_attr.attr,
&sensor_dev_attr_fan6_max.dev_attr.attr,
NULL
};
......@@ -1686,13 +1726,22 @@ static const struct attribute_group dme1737_fan_group[] = {
* writeable if the chip is *not* locked. Otherwise they stay read-only. */
static struct attribute *dme1737_attr_lock[] = {
/* Temperatures */
SENSOR_DEV_ATTR_TEMP_LOCK(1),
SENSOR_DEV_ATTR_TEMP_LOCK(2),
SENSOR_DEV_ATTR_TEMP_LOCK(3),
&sensor_dev_attr_temp1_offset.dev_attr.attr,
&sensor_dev_attr_temp2_offset.dev_attr.attr,
&sensor_dev_attr_temp3_offset.dev_attr.attr,
/* Zones */
SENSOR_DEV_ATTR_ZONE_LOCK(1),
SENSOR_DEV_ATTR_ZONE_LOCK(2),
SENSOR_DEV_ATTR_ZONE_LOCK(3),
&sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
&sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
NULL
};
......@@ -1704,23 +1753,40 @@ static const struct attribute_group dme1737_lock_group = {
* writeable if the chip is *not* locked and the respective PWM is available.
* Otherwise they stay read-only. */
static struct attribute *dme1737_attr_pwm1_lock[] = {
SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
&sensor_dev_attr_pwm1_freq.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm2_lock[] = {
SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
&sensor_dev_attr_pwm2_freq.dev_attr.attr,
&sensor_dev_attr_pwm2_enable.dev_attr.attr,
&sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm3_lock[] = {
SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
&sensor_dev_attr_pwm3_freq.dev_attr.attr,
&sensor_dev_attr_pwm3_enable.dev_attr.attr,
&sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm5_lock[] = {
SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
&sensor_dev_attr_pwm5.dev_attr.attr,
&sensor_dev_attr_pwm5_freq.dev_attr.attr,
NULL
};
static struct attribute *dme1737_attr_pwm6_lock[] = {
SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
&sensor_dev_attr_pwm6.dev_attr.attr,
&sensor_dev_attr_pwm6_freq.dev_attr.attr,
NULL
};
......@@ -2109,6 +2175,7 @@ static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
kind = dme1737;
name = "dme1737";
data->type = kind;
/* Fill in the remaining client fields and put it into the global
* list */
......@@ -2301,6 +2368,7 @@ static int __devinit dme1737_isa_probe(struct platform_device *pdev)
err = -ENODEV;
goto exit_kfree;
}
data->type = -1;
/* Fill in the remaining client fields and initialize the mutex */
strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
......@@ -2377,7 +2445,10 @@ static int __init dme1737_init(void)
}
if (dme1737_isa_detect(0x2e, &addr) &&
dme1737_isa_detect(0x4e, &addr)) {
dme1737_isa_detect(0x4e, &addr) &&
(!probe_all_addr ||
(dme1737_isa_detect(0x162e, &addr) &&
dme1737_isa_detect(0x164e, &addr)))) {
/* Return 0 if we didn't find an ISA device */
return 0;
}
......
......@@ -30,14 +30,37 @@
#include "lm75.h"
/* Addresses to scan */
/*
* This driver handles the LM75 and compatible digital temperature sensors.
* Only types which are _not_ listed in I2C_CLIENT_INSMOD_*() need to be
* listed here. We start at 9 since I2C_CLIENT_INSMOD_*() currently allow
* definition of up to 8 chip types (plus zero).
*/
enum lm75_type { /* keep sorted in alphabetical order */
ds1775 = 9,
ds75,
/* lm75 -- in I2C_CLIENT_INSMOD_1() */
lm75a,
max6625,
max6626,
mcp980x,