Commit 6420014c authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
Browse files

ath9k: remove ath9k 25 MHz HT40 spacing stuff



This was for supporting 25 MHz spacing for HT40, this is not used
as we use 20 MHz spacing instead for HT40 as per 802.11n. The hardware
is capable of it though so we leave the phymode definition and EEPROM
parsing for it. If some experimenter wants to work on this stuff stuff
you can add an extension enabling bool on ath_common and perhaps some
debugfs knob to enable it. Keep in mind you'll also need to update the
phymode with the AR_PHY_FC_DYN2040_EXT_CH which has been left on the
driver.
Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 43c27613
...@@ -592,7 +592,6 @@ struct ath_softc { ...@@ -592,7 +592,6 @@ struct ath_softc {
bool ps_enabled; bool ps_enabled;
unsigned long ps_usecount; unsigned long ps_usecount;
enum ath9k_int imask; enum ath9k_int imask;
enum ath9k_ht_extprotspacing ht_extprotspacing;
enum ath9k_ht_macmode tx_chan_width; enum ath9k_ht_macmode tx_chan_width;
struct ath_config config; struct ath_config config;
......
...@@ -213,10 +213,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah, ...@@ -213,10 +213,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah,
centers->ctl_center = centers->ctl_center =
centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT);
/* 25 MHz spacing is supported by hw but not on upper layers */
centers->ext_center = centers->ext_center =
centers->synth_center + (extoff * centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
((ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_20) ?
HT40_CHANNEL_CENTER_SHIFT : 15));
} }
/******************/ /******************/
...@@ -1759,8 +1758,6 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1759,8 +1758,6 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan,
(chan->chanmode == CHANNEL_G_HT40PLUS)) (chan->chanmode == CHANNEL_G_HT40PLUS))
phymode |= AR_PHY_FC_DYN2040_PRI_CH; phymode |= AR_PHY_FC_DYN2040_PRI_CH;
if (ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_25)
phymode |= AR_PHY_FC_DYN2040_EXT_CH;
} }
REG_WRITE(ah, AR_PHY_TURBO, phymode); REG_WRITE(ah, AR_PHY_TURBO, phymode);
...@@ -2333,7 +2330,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -2333,7 +2330,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
u64 tsf = 0; u64 tsf = 0;
int i, rx_chainmask, r; int i, rx_chainmask, r;
ah->extprotspacing = sc->ht_extprotspacing;
ah->txchainmask = common->tx_chainmask; ah->txchainmask = common->tx_chainmask;
ah->rxchainmask = common->rx_chainmask; ah->rxchainmask = common->rx_chainmask;
......
...@@ -563,7 +563,6 @@ struct ath_hw { ...@@ -563,7 +563,6 @@ struct ath_hw {
struct ath_btcoex_hw btcoex_hw; struct ath_btcoex_hw btcoex_hw;
u32 intr_txqs; u32 intr_txqs;
enum ath9k_ht_extprotspacing extprotspacing;
u8 txchainmask; u8 txchainmask;
u8 rxchainmask; u8 rxchainmask;
......
...@@ -619,11 +619,6 @@ enum ath9k_ht_macmode { ...@@ -619,11 +619,6 @@ enum ath9k_ht_macmode {
ATH9K_HT_MACMODE_2040 = 1, ATH9K_HT_MACMODE_2040 = 1,
}; };
enum ath9k_ht_extprotspacing {
ATH9K_HT_EXTPROTSPACING_20 = 0,
ATH9K_HT_EXTPROTSPACING_25 = 1,
};
struct ath_hw; struct ath_hw;
struct ath9k_channel; struct ath9k_channel;
struct ath_rate_table; struct ath_rate_table;
......
...@@ -45,6 +45,7 @@ bool ath9k_hw_init_rf(struct ath_hw *ah, ...@@ -45,6 +45,7 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_FC_DYN2040_EN 0x00000004 #define AR_PHY_FC_DYN2040_EN 0x00000004
#define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008 #define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008
#define AR_PHY_FC_DYN2040_PRI_CH 0x00000010 #define AR_PHY_FC_DYN2040_PRI_CH 0x00000010
/* For 25 MHz channel spacing -- not used but supported by hw */
#define AR_PHY_FC_DYN2040_EXT_CH 0x00000020 #define AR_PHY_FC_DYN2040_EXT_CH 0x00000020
#define AR_PHY_FC_HT_EN 0x00000040 #define AR_PHY_FC_HT_EN 0x00000040
#define AR_PHY_FC_SHORT_GI_40 0x00000080 #define AR_PHY_FC_SHORT_GI_40 0x00000080
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment