Commit 635f0258 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

[ARM] clps7500: remove support



The CLPS7500 platform has not built since 2.6.22-git7 and there
seems to be no interest in fixing it.  So, remove the platform
support.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ed313489
......@@ -243,15 +243,6 @@ config ARCH_AT91
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors.
config ARCH_CLPS7500
bool "Cirrus CL-PS7500FE"
select TIMER_ACORN
select ISA
select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
help
Support for the Cirrus Logic PS7500FE system-on-a-chip.
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based"
help
......
......@@ -96,7 +96,6 @@ textofs-y := 0x00008000
machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_EBSA110) := ebsa110
machine-$(CONFIG_ARCH_CLPS7500) := clps7500
machine-$(CONFIG_FOOTBRIDGE) := footbridge
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SA1100) := sa1100
......
......@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
OBJS += head-l7200.o
endif
ifeq ($(CONFIG_ARCH_CLPS7500),y)
HEAD = head-clps7500.o
endif
ifeq ($(CONFIG_ARCH_P720T),y)
# Borrow this code from SA1100
OBJS += head-sa1100.o
......
/*
* linux/arch/arm/boot/compressed/head-clps7500.S
*
* Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
*/
/* There are three different ways the kernel can be
booted on a 7500 system: from Angel (loaded in RAM), from
16-bit ROM or from 32-bit Flash. Luckily, a single kernel
image does for them all. */
/* This branch is taken if the CPU memory width matches the
actual device in use. The default at power on is 16 bits
so we must be prepared for a mismatch. */
.section ".start", "ax"
2:
b 1f
.word 0xffff
.word 0xb632 @ mov r11, #0x03200000
.word 0xe3a0
.word 0x0000 @ mov r0, #0
.word 0xe3a0
.word 0x0080 @ strb r0, [r11, #0x80]
.word 0xe5cb
.word 0xf000 @ mov pc, #0
.word 0xe3a0
1:
adr r1, 2b
teq r1, #0
bne .Langel
/* This is a direct-from-ROM boot. Copy the kernel into
RAM and run it there. */
mov r0, #0x30
mcr p15, 0, r0, c1, c0, 0
mov r0, #0x13
msr cpsr_cxsf, r0
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0x5500
str r0, [r12]
mov r0, #0x10000000
orr r0, r0, #0x8000
mov r4, r0
ldr r2, =_end
2:
ldr r3, [r1], #4
str r3, [r0], #4
teq r0, r2
bne 2b
mov r0, #0xff00
str r0, [r12]
1:
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0xfe00
str r0, [r12]
adr lr, 1f
mov r0, #0
mov r1, #14 /* MACH_TYPE_CLPS7500 */
mov pc, lr
.Langel:
#ifdef CONFIG_ANGELBOOT
/* Call Angel to switch into SVC mode. */
mov r0, #0x17
swi 0x123456
#endif
/* Ensure all interrupts are off and MMU disabled */
mrs r0, cpsr
orr r0, r0, #0xc0
msr cpsr_cxsf, r0
adr lr, 1b
orr lr, lr, #0x10000000
mov r0, #0x30 @ MMU off
mcr p15, 0, r0, c1, c0, 0
mov r0, r0
mov pc, lr
.ltorg
1:
/* And the rest */
#include "head.S"
......@@ -32,19 +32,11 @@
#define IOMD_KARTRX (0x004)
#define IOMD_KCTRL (0x008)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IOLINES (0x00C)
#endif
#define IOMD_IRQSTATA (0x010)
#define IOMD_IRQREQA (0x014)
#define IOMD_IRQCLRA (0x014)
#define IOMD_IRQMASKA (0x018)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_SUSMODE (0x01C)
#endif
#define IOMD_IRQSTATB (0x020)
#define IOMD_IRQREQB (0x024)
#define IOMD_IRQMASKB (0x028)
......@@ -53,10 +45,6 @@
#define IOMD_FIQREQ (0x034)
#define IOMD_FIQMASK (0x038)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_CLKCTL (0x03C)
#endif
#define IOMD_T0CNTL (0x040)
#define IOMD_T0LTCHL (0x040)
#define IOMD_T0CNTH (0x044)
......@@ -71,18 +59,6 @@
#define IOMD_T1GO (0x058)
#define IOMD_T1LATCH (0x05c)
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_IRQSTATC (0x060)
#define IOMD_IRQREQC (0x064)
#define IOMD_IRQMASKC (0x068)
#define IOMD_VIDMUX (0x06c)
#define IOMD_IRQSTATD (0x070)
#define IOMD_IRQREQD (0x074)
#define IOMD_IRQMASKD (0x078)
#endif
#define IOMD_ROMCR0 (0x080)
#define IOMD_ROMCR1 (0x084)
#ifdef CONFIG_ARCH_RPC
......@@ -100,11 +76,6 @@
#define IOMD_MOUSEY (0x0A4)
#endif
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_MSEDAT (0x0A8)
#define IOMD_MSECTL (0x0Ac)
#endif
#ifdef CONFIG_ARCH_RPC
#define IOMD_DMATCR (0x0C0)
#endif
......@@ -113,18 +84,6 @@
#ifdef CONFIG_ARCH_RPC
#define IOMD_DMAEXT (0x0CC)
#endif
#ifdef CONFIG_ARCH_CLPS7500
#define IOMD_ASTCR (0x0CC)
#define IOMD_DRAMCR (0x0D0)
#define IOMD_SELFREF (0x0D4)
#define IOMD_ATODICR (0x0E0)
#define IOMD_ATODSR (0x0E4)
#define IOMD_ATODCC (0x0E8)
#define IOMD_ATODCNT1 (0x0EC)
#define IOMD_ATODCNT2 (0x0F0)
#define IOMD_ATODCNT3 (0x0F4)
#define IOMD_ATODCNT4 (0x0F8)
#endif
#ifdef CONFIG_ARCH_RPC
#define DMA_EXT_IO0 1
......
......@@ -38,7 +38,6 @@ else
endif
lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
lib-$(CONFIG_ARCH_CLPS7500) += io-acorn.o
lib-$(CONFIG_ARCH_L7200) += io-acorn.o
lib-$(CONFIG_ARCH_SHARK) += io-shark.o
......
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y := core.o
obj-m :=
obj-n :=
obj- :=
/*
* linux/arch/arm/mach-clps7500/core.c
*
* Copyright (C) 1998 Russell King
* Copyright (C) 1999 Nexus Electronics Ltd
*
* Extra MM routines for CL7500 architecture
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/serial_8250.h>
#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
unsigned int vram_size;
static void cl7500_ack_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val & ~mask, IOMD_IRQMASKA);
iomd_writeb(mask, IOMD_IRQCLRA);
}
static void cl7500_mask_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val & ~mask, IOMD_IRQMASKA);
}
static void cl7500_unmask_irq_a(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << irq;
val = iomd_readb(IOMD_IRQMASKA);
iomd_writeb(val | mask, IOMD_IRQMASKA);
}
static struct irq_chip clps7500_a_chip = {
.ack = cl7500_ack_irq_a,
.mask = cl7500_mask_irq_a,
.unmask = cl7500_unmask_irq_a,
};
static void cl7500_mask_irq_b(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKB);
iomd_writeb(val & ~mask, IOMD_IRQMASKB);
}
static void cl7500_unmask_irq_b(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKB);
iomd_writeb(val | mask, IOMD_IRQMASKB);
}
static struct irq_chip clps7500_b_chip = {
.ack = cl7500_mask_irq_b,
.mask = cl7500_mask_irq_b,
.unmask = cl7500_unmask_irq_b,
};
static void cl7500_mask_irq_c(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKC);
iomd_writeb(val & ~mask, IOMD_IRQMASKC);
}
static void cl7500_unmask_irq_c(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKC);
iomd_writeb(val | mask, IOMD_IRQMASKC);
}
static struct irq_chip clps7500_c_chip = {
.ack = cl7500_mask_irq_c,
.mask = cl7500_mask_irq_c,
.unmask = cl7500_unmask_irq_c,
};
static void cl7500_mask_irq_d(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKD);
iomd_writeb(val & ~mask, IOMD_IRQMASKD);
}
static void cl7500_unmask_irq_d(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_IRQMASKD);
iomd_writeb(val | mask, IOMD_IRQMASKD);
}
static struct irq_chip clps7500_d_chip = {
.ack = cl7500_mask_irq_d,
.mask = cl7500_mask_irq_d,
.unmask = cl7500_unmask_irq_d,
};
static void cl7500_mask_irq_dma(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_DMAMASK);
iomd_writeb(val & ~mask, IOMD_DMAMASK);
}
static void cl7500_unmask_irq_dma(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_DMAMASK);
iomd_writeb(val | mask, IOMD_DMAMASK);
}
static struct irq_chip clps7500_dma_chip = {
.ack = cl7500_mask_irq_dma,
.mask = cl7500_mask_irq_dma,
.unmask = cl7500_unmask_irq_dma,
};
static void cl7500_mask_irq_fiq(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_FIQMASK);
iomd_writeb(val & ~mask, IOMD_FIQMASK);
}
static void cl7500_unmask_irq_fiq(unsigned int irq)
{
unsigned int val, mask;
mask = 1 << (irq & 7);
val = iomd_readb(IOMD_FIQMASK);
iomd_writeb(val | mask, IOMD_FIQMASK);
}
static struct irq_chip clps7500_fiq_chip = {
.ack = cl7500_mask_irq_fiq,
.mask = cl7500_mask_irq_fiq,
.unmask = cl7500_unmask_irq_fiq,
};
static void cl7500_no_action(unsigned int irq)
{
}
static struct irq_chip clps7500_no_chip = {
.ack = cl7500_no_action,
.mask = cl7500_no_action,
.unmask = cl7500_no_action,
};
static struct irqaction irq_isa = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "isa",
};
static void __init clps7500_init_irq(void)
{
unsigned int irq, flags;
iomd_writeb(0, IOMD_IRQMASKA);
iomd_writeb(0, IOMD_IRQMASKB);
iomd_writeb(0, IOMD_FIQMASK);
iomd_writeb(0, IOMD_DMAMASK);
for (irq = 0; irq < NR_IRQS; irq++) {
flags = IRQF_VALID;
if (irq <= 6 || (irq >= 9 && irq <= 15) ||
(irq >= 48 && irq <= 55))
flags |= IRQF_PROBE;
switch (irq) {
case 0 ... 7:
set_irq_chip(irq, &clps7500_a_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 8 ... 15:
set_irq_chip(irq, &clps7500_b_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 16 ... 22:
set_irq_chip(irq, &clps7500_dma_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 24 ... 31:
set_irq_chip(irq, &clps7500_c_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 40 ... 47:
set_irq_chip(irq, &clps7500_d_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 48 ... 55:
set_irq_chip(irq, &clps7500_no_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
case 64 ... 72:
set_irq_chip(irq, &clps7500_fiq_chip);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, flags);
break;
}
}
setup_irq(IRQ_ISA, &irq_isa);
}
static struct map_desc cl7500_io_desc[] __initdata = {
{ /* IO space */
.virtual = (unsigned long)IO_BASE,
.pfn = __phys_to_pfn(IO_START),
.length = IO_SIZE,
.type = MT_DEVICE
}, { /* ISA space */
.virtual = ISA_BASE,
.pfn = __phys_to_pfn(ISA_START),
.length = ISA_SIZE,
.type = MT_DEVICE
}, { /* Flash */
.virtual = CLPS7500_FLASH_BASE,
.pfn = __phys_to_pfn(CLPS7500_FLASH_START),
.length = CLPS7500_FLASH_SIZE,
.type = MT_DEVICE
}, { /* LED */
.virtual = LED_BASE,
.pfn = __phys_to_pfn(LED_START),
.length = LED_SIZE,
.type = MT_DEVICE
}
};
static void __init clps7500_map_io(void)
{
iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
}
extern void ioctime_init(void);
extern unsigned long ioc_timer_gettimeoffset(void);
static irqreturn_t
clps7500_timer_interrupt(int irq, void *dev_id)
{
timer_tick();
/* Why not using do_leds interface?? */
{
/* Twinkle the lights. */
static int count, state = 0xff00;
if (count-- == 0) {
state ^= 0x100;
count = 25;
*((volatile unsigned int *)LED_ADDRESS) = state;
}
}
return IRQ_HANDLED;
}
static struct irqaction clps7500_timer_irq = {
.name = "CLPS7500 Timer Tick",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = clps7500_timer_interrupt,
};
/*
* Set up timer interrupt.
*/
static void __init clps7500_timer_init(void)
{
ioctime_init();
setup_irq(IRQ_TIMER, &clps7500_timer_irq);
}
static struct sys_timer clps7500_timer = {
.init = clps7500_timer_init,
.offset = ioc_timer_gettimeoffset,
};
static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = 0x03010fe0,
.irq = 10,
.uartclk = 1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
},
{
.mapbase = 0x03010be0,
.irq = 0,
.uartclk = 1843200,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
},
{
.iobase = ISASLOT_IO + 0x2e8,
.irq = 41,
.uartclk = 1843200,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{
.iobase = ISASLOT_IO + 0x3e8,
.irq = 40,
.uartclk = 1843200,
.regshift = 0,
.iotype = UPIO_PORT,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = serial_platform_data,
},
};
static void __init clps7500_init(void)
{
platform_device_register(&serial_device);
}