Commit 5a148af6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Pull powerpc update from Benjamin Herrenschmidt:
 "The main highlights this time around are:

   - A pile of addition POWER8 bits and nits, such as updated
     performance counter support (Michael Ellerman), new branch history
     buffer support (Anshuman Khandual), base support for the new PCI
     host bridge when not using the hypervisor (Gavin Shan) and other
     random related bits and fixes from various contributors.

   - Some rework of our page table format by Aneesh Kumar which fixes a
     thing or two and paves the way for THP support.  THP itself will
     not make it this time around however.

   - More Freescale updates, including Altivec support on the new e6500
     cores, new PCI controller support, and a pile of new boards support
     and updates.

   - The usual batch of trivial cleanups & fixes"

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (156 commits)
  powerpc: Fix build error for book3e
  powerpc: Context switch the new EBB SPRs
  powerpc: Turn on the EBB H/FSCR bits
  powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207S
  powerpc: Setup BHRB instructions facility in HFSCR for POWER8
  powerpc: Fix interrupt range check on debug exception
  powerpc: Update tlbie/tlbiel as per ISA doc
  powerpc: Print page size info during boot
  powerpc: print both base and actual page size on hash failure
  powerpc: Fix hpte_decode to use the correct decoding for page sizes
  powerpc: Decode the pte-lp-encoding bits correctly.
  powerpc: Use encode avpn where we need only avpn values
  powerpc: Reduce PTE table memory wastage
  powerpc: Move the pte free routines from common header
  powerpc: Reduce the PTE_INDEX_SIZE
  powerpc: Switch 16GB and 16MB explicit hugepages to a different page table format
  powerpc: New hugepage directory format
  powerpc: Don't truncate pgd_index wrongly
  powerpc: Don't hard code the size of pte page
  powerpc: Save DAR and DSISR in pt_regs on MCE
  ...
parents 99c6bcf4 54d5999d
===================================================================
Power Architecture CPU Binding
Copyright 2013 Freescale Semiconductor Inc.
Power Architecture CPUs in Freescale SOCs are represented in device trees as
per the definition in ePAPR.
In addition to the ePAPR definitions, the properties defined below may be
present on CPU nodes.
PROPERTIES
- fsl,eref-*
Usage: optional
Value type: <empty>
Definition: The EREF (EREF: A Programmer.s Reference Manual for
Freescale Power Architecture) defines the architecture for Freescale
Power CPUs. The EREF defines some architecture categories not defined
by the Power ISA. For these EREF-specific categories, the existence of
a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
name with all uppercase letters converted to lowercase, indicates that
the category is supported by the implementation.
......@@ -14,10 +14,6 @@ hvcs.txt
- IBM "Hypervisor Virtual Console Server" Installation Guide
mpc52xx.txt
- Linux 2.6.x on MPC52xx family
sound.txt
- info on sound support under Linux/PPC
zImage_layout.txt
- info on the kernel images for Linux/PPC
qe_firmware.txt
- describes the layout of firmware binaries for the Freescale QUICC
Engine and the code that parses and uploads the microcode therein.
......@@ -40,6 +40,7 @@ features will have bits indicating whether there is support for:
#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
2. PTRACE_SETHWDEBUG
......
Information about PowerPC Sound support
=====================================================================
Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
comments or corrections.
Last Change: 6.16.99
This just covers sound on the PReP and CHRP systems for now and later
will contain information on the PowerMac's.
Sound on PReP has been tested and is working with the PowerStack and IBM
Power Series onboard sound systems which are based on the cs4231(2) chip.
The sound options when doing the make config are a bit different from
the default, though.
The I/O base, irq and dma lines that you enter during the make config
are ignored and are set when booting according to the machine type.
This is so that one binary can be used for Motorola and IBM machines
which use different values and isn't allowed by the driver, so things
are hacked together in such a way as to allow this information to be
set automatically on boot.
1. Motorola PowerStack PReP machines
Enable support for "Crystal CS4232 based (PnP) cards" and for the
Microsoft Sound System. The MSS isn't used, but some of the routines
that the CS4232 driver uses are in it.
Although the options you set are ignored and determined automatically
on boot these are included for information only:
(830) CS4232 audio I/O base 530, 604, E80 or F40
(10) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
(6) CS4232 audio DMA 0, 1 or 3
(7) CS4232 second (duplex) DMA 0, 1 or 3
This will allow simultaneous record and playback, as 2 different dma
channels are used.
The sound will be all left channel and very low volume since the
auxiliary input isn't muted by default. I had the changes necessary
for this in the kernel but the sound driver maintainer didn't want
to include them since it wasn't common in other machines. To fix this
you need to mute it using a mixer utility of some sort (if you find one
please let me know) or by patching the driver yourself and recompiling.
There is a problem on the PowerStack 2's (PowerStack Pro's) using a
different irq/drq than the kernel expects. Unfortunately, I don't know
which irq/drq it is so if anyone knows please email me.
Midi is not supported since the cs4232 driver doesn't support midi yet.
2. IBM PowerPersonal PReP machines
I've only tested sound on the Power Personal Series of IBM workstations
so if you try it on others please let me know the result. I'm especially
interested in the 43p's sound system, which I know nothing about.
Enable support for "Crystal CS4232 based (PnP) cards" and for the
Microsoft Sound System. The MSS isn't used, but some of the routines
that the CS4232 driver uses are in it.
Although the options you set are ignored and determined automatically
on boot these are included for information only:
(530) CS4232 audio I/O base 530, 604, E80 or F40
(5) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
(1) CS4232 audio DMA 0, 1 or 3
(7) CS4232 second (duplex) DMA 0, 1 or 3
(330) CS4232 MIDI I/O base 330, 370, 3B0 or 3F0
(9) CS4232 MIDI IRQ 5, 7, 9, 11, 12 or 15
This setup does _NOT_ allow for recording yet.
Midi is not supported since the cs4232 driver doesn't support midi yet.
2. IBM CHRP
I have only tested this on the 43P-150. Build the kernel with the cs4232
set as a module and load the module with irq=9 dma=1 dma2=2 io=0x550
Information about the Linux/PPC kernel images
=====================================================================
Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
comments or corrections.
This document is meant to answer several questions I've had about how
the PReP system boots and how Linux/PPC interacts with that mechanism.
It would be nice if we could have information on how other architectures
boot here as well. If you have anything to contribute, please
let me know.
1. PReP boot file
This is the file necessary to boot PReP systems from floppy or
hard drive. The firmware reads the PReP partition table entry
and will load the image accordingly.
To boot the zImage, copy it onto a floppy with dd if=zImage of=/dev/fd0h1440
or onto a PReP hard drive partition with dd if=zImage of=/dev/sda4
assuming you've created a PReP partition (type 0x41) with fdisk on
/dev/sda4.
The layout of the image format is:
0x0 +------------+
| | PReP partition table entry
| |
0x400 +------------+
| | Bootstrap program code + data
| |
| |
+------------+
| | compressed kernel, elf header removed
+------------+
| | initrd (if loaded)
+------------+
| | Elf section table for bootstrap program
+------------+
2. MBX boot file
The MBX boards can load an elf image, and relocate it to the
proper location in memory - it copies the image to the location it was
linked at.
......@@ -93,11 +93,6 @@ config ARCH_SPARSEMEM_ENABLE
config ARCH_SPARSEMEM_DEFAULT
def_bool y
config MAX_ACTIVE_REGIONS
int
default "2" if SPARSEMEM
default "1"
config ARCH_SELECT_MEMORY_MODEL
def_bool y
......
......@@ -427,11 +427,6 @@ config NODES_SHIFT
default "4"
depends on NEED_MULTIPLE_NODES
config MAX_ACTIVE_REGIONS
int
default "256" if PPC64
default "32"
config ARCH_SELECT_MEMORY_MODEL
def_bool y
depends on PPC64
......@@ -646,14 +641,14 @@ menu "Bus options"
config ISA
bool "Support for ISA-bus hardware"
depends on PPC_PREP || PPC_CHRP
depends on PPC_CHRP
select PPC_I8259
help
Find out whether you have ISA slots on your motherboard. ISA is the
name of a bus system, i.e. the way the CPU talks to the other stuff
inside your box. If you have an Apple machine, say N here; if you
have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If
you have an embedded board, consult your board documentation.
have an IBM RS/6000 or pSeries machine, say Y. If you have an
embedded board, consult your board documentation.
config ZONE_DMA
bool
......@@ -685,7 +680,6 @@ config SBUS
config FSL_SOC
bool
select HAVE_CAN_FLEXCAN if NET && CAN
select PPC_CLOCK
config FSL_PCI
bool
......@@ -744,7 +738,6 @@ config PCI
bool "PCI support" if PPC_PCI_CHOICE
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
select GENERIC_PCI_IOMAP
......@@ -774,11 +767,6 @@ config PCI_8260
select PPC_INDIRECT_PCI
default y
config 8260_PCI9
bool "Enable workaround for MPC826x erratum PCI 9"
depends on PCI_8260 && !8272
default y
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
......@@ -968,7 +956,7 @@ config TASK_SIZE_BOOL
config TASK_SIZE
hex "Size of user task space" if TASK_SIZE_BOOL
default "0x80000000" if PPC_PREP || PPC_8xx
default "0x80000000" if PPC_8xx
default "0xc0000000"
config CONSISTENT_SIZE_BOOL
......
/*
* Device Tree Source for the MPC5121e based ac14xx board
*
* Copyright 2012 Anatolij Gustschin <agust@denx.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/include/ "mpc5121.dtsi"
/ {
model = "ac14xx";
compatible = "ifm,ac14xx", "fsl,mpc5121";
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &serial0;
serial1 = &serial7;
spi4 = &spi4;
spi5 = &spi5;
};
cpus {
PowerPC,5121@0 {
timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
bus-frequency = <160000000>; /* 160 MHz csb bus */
clock-frequency = <400000000>; /* 400 MHz ppc core */
};
};
memory {
reg = <0x00000000 0x10000000>; /* 256MB at 0 */
};
nfc@40000000 {
status = "disabled";
};
localbus@80000020 {
ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
device-width = <2>;
partition@0 {
label = "dtb-kernel-production";
reg = <0x00000000 0x00400000>;
};
partition@1 {
label = "filesystem-production";
reg = <0x00400000 0x03400000>;
};
partition@2 {
label = "recovery";
reg = <0x03800000 0x00700000>;
};
partition@3 {
label = "uboot-code";
reg = <0x03f00000 0x00040000>;
};
partition@4 {
label = "uboot-env1";
reg = <0x03f40000 0x00020000>;
};
partition@5 {
label = "uboot-env2";
reg = <0x03f60000 0x00020000>;
};
};
fram@1,0 {
compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
reg = <1 0x00000000 0x00010000>;
};
asi@2,0 {
/* masters mapping: CS, CS offset, size */
reg = <2 0x00000000 0x00080000
6 0x00000000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "ifm,ac14xx-asi-fpga";
gpios = <
&gpio_pic 26 0 /* prog */
&gpio_pic 27 0 /* done */
&gpio_pic 10 0 /* reset */
>;
master@1 {
interrupts = <20 0x2>;
interrupt-parent = <&gpio_pic>;
chipselect = <2 0x00009000 0x00009100>;
label = "AS-i master 1";
};
master@2 {
interrupts = <21 0x2>;
interrupt-parent = <&gpio_pic>;
chipselect = <6 0x00009000 0x00009100>;
label = "AS-i master 2";
};
};
netx@3,0 {
compatible = "ifm,netx";
reg = <0x3 0x00000000 0x00020000>;
chipselect = <3 0x00101140 0x00203100>;
interrupts = <17 0x8>;
gpios = <&gpio_pic 15 0>;
};
safety@5,0 {
compatible = "ifm,safety";
reg = <0x5 0x00000000 0x00010000>;
chipselect = <5 0x00009000 0x00009100>;
interrupts = <22 0x2>;
interrupt-parent = <&gpio_pic>;
gpios = <
&gpio_pic 12 0 /* prog */
&gpio_pic 11 0 /* done */
>;
};
};
soc@80000000 {
clock@f00 {
compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
};
/*
* GPIO PIC:
* interrupts cell = <pin nr, sense>
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
gpio_pic: gpio@1100 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sdhc@1500 {
cd-gpios = <&gpio_pic 23 0>; /* card detect */
wp-gpios = <&gpio_pic 24 0>; /* write protect */
wp-inverted; /* WP active high */
};
i2c@1700 {
/* use Fast-mode */
clock-frequency = <400000>;
at24@30 {
compatible = "at24,24c01";
reg = <0x30>;
};
at24@31 {
compatible = "at24,24c01";
reg = <0x31>;
};
temp@48 {
compatible = "ad,ad7414";
reg = <0x48>;
};
at24@50 {
compatible = "at24,24c01";
reg = <0x50>;
};
at24@51 {
compatible = "at24,24c01";
reg = <0x51>;
};
at24@52 {
compatible = "at24,24c01";
reg = <0x52>;
};
at24@53 {
compatible = "at24,24c01";
reg = <0x53>;
};
at24@54 {
compatible = "at24,24c01";
reg = <0x54>;
};
at24@55 {
compatible = "at24,24c01";
reg = <0x55>;
};
at24@56 {
compatible = "at24,24c01";
reg = <0x56>;
};
at24@57 {
compatible = "at24,24c01";
reg = <0x57>;
};
rtc@68 {
compatible = "stm,m41t00";
reg = <0x68>;
};
};
axe_pic: axe-base@2000 {
compatible = "fsl,mpc5121-axe-base";
reg = <0x2000 0x100>;
interrupts = <42 0x8>;
interrupt-controller;
#interrupt-cells = <2>;
};
axe-app {
compatible = "fsl,mpc5121-axe-app";
interrupt-parent = <&axe_pic>;
interrupts = <
/* soft interrupts */
0 0x0 1 0x0 2 0x0 3 0x0
4 0x0 5 0x0 6 0x0 7 0x0
/* fifo interrupts */
8 0x0 9 0x0 10 0x0 11 0x0
>;
};
display@2100 {
edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
};
can@2300 {
status = "disabled";
};
can@2380 {
status = "disabled";
};
viu@2400 {
status = "disabled";
};
mdio@2800 {
phy0: ethernet-phy@1f {
compatible = "smsc,lan8700";
reg = <0x1f>;
};
};
enet: ethernet@2800 {
phy-handle = <&phy0>;
};
usb@3000 {
status = "disabled";
};
usb@4000 {
status = "disabled";
};
/* PSC3 serial port A, aka ttyPSC0 */
serial0: psc@11300 {
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <512>;
fsl,tx-fifo-size = <512>;
};
/* PSC4 in SPI mode */
spi4: psc@11400 {
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <768>;
fsl,tx-fifo-size = <768>;
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
cs-gpios = <&gpio_pic 25 0>;
flash: m25p128@0 {
compatible = "st,m25p128";
spi-max-frequency = <20000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "spi-flash0";
reg = <0x00000000 0x01000000>;
};
};
};
/* PSC5 in SPI mode */
spi5: psc@11500 {
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
fsl,mode = "spi-master";
fsl,rx-fifo-size = <128>;
fsl,tx-fifo-size = <128>;
#address-cells = <1>;
#size-cells = <0>;
lcd@0 {
compatible = "ilitek,ili922x";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
};
};
/* PSC7 serial port C, aka ttyPSC2 */
serial7: psc@11700 {
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
fsl,rx-fifo-size = <512>;
fsl,tx-fifo-size = <512>;
};
matrix_keypad@0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <1>;
gpio-activelow;
col-gpios-binary;
col-switch-delay-ms = <200>;
col-gpios = <&gpio_pic 1 0>; /* pin1 */
row-gpios = <&gpio_pic 2 0 /* pin2 */
&gpio_pic 3 0 /* pin3 */
&gpio_pic 4 0>; /* pin4 */