Commit 5725aeae authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'depends/rmk/memory_h' into next/fixes

Fix up all conflicts between the memory.h cleanup and bug fixes.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 43872fa7 0cdc8b92
...@@ -195,7 +195,8 @@ config VECTORS_BASE ...@@ -195,7 +195,8 @@ config VECTORS_BASE
The base address of exception vectors. The base address of exception vectors.
config ARM_PATCH_PHYS_VIRT config ARM_PATCH_PHYS_VIRT
bool "Patch physical to virtual translations at runtime" bool "Patch physical to virtual translations at runtime" if EMBEDDED
default y
depends on !XIP_KERNEL && MMU depends on !XIP_KERNEL && MMU
depends on !ARCH_REALVIEW || !SPARSEMEM depends on !ARCH_REALVIEW || !SPARSEMEM
help help
...@@ -204,16 +205,25 @@ config ARM_PATCH_PHYS_VIRT ...@@ -204,16 +205,25 @@ config ARM_PATCH_PHYS_VIRT
kernel in system memory. kernel in system memory.
This can only be used with non-XIP MMU kernels where the base This can only be used with non-XIP MMU kernels where the base
of physical memory is at a 16MB boundary, or theoretically 64K of physical memory is at a 16MB boundary.
for the MSM machine class.
config ARM_PATCH_PHYS_VIRT_16BIT Only disable this option if you know that you do not require
def_bool y this feature (eg, building a kernel for a single machine) and
depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM you need to shrink the kernel to the minimal size.
config NEED_MACH_MEMORY_H
bool
help
Select this when mach/memory.h is required to provide special
definitions for this platform. The need for mach/memory.h should
be avoided when possible.
config PHYS_OFFSET
hex "Physical address of main memory"
depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
help help
This option extends the physical to virtual translation patching Please provide the physical address corresponding to the
to allow physical memory down to a theoretical minimum of 64K location of main memory in your system.
boundaries.
source "init/Kconfig" source "init/Kconfig"
...@@ -246,6 +256,7 @@ config ARCH_INTEGRATOR ...@@ -246,6 +256,7 @@ config ARCH_INTEGRATOR
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select PLAT_VERSATILE select PLAT_VERSATILE
select PLAT_VERSATILE_FPGA_IRQ select PLAT_VERSATILE_FPGA_IRQ
select NEED_MACH_MEMORY_H
help help
Support for ARM's Integrator platform. Support for ARM's Integrator platform.
...@@ -261,6 +272,7 @@ config ARCH_REALVIEW ...@@ -261,6 +272,7 @@ config ARCH_REALVIEW
select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_CLCD
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select GPIO_PL061 if GPIOLIB select GPIO_PL061 if GPIOLIB
select NEED_MACH_MEMORY_H
help help
This enables support for ARM Ltd RealView boards. This enables support for ARM Ltd RealView boards.
...@@ -301,7 +313,6 @@ config ARCH_AT91 ...@@ -301,7 +313,6 @@ config ARCH_AT91
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK select HAVE_CLK
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select ARM_PATCH_PHYS_VIRT if MMU
help help
This enables support for systems based on the Atmel AT91RM9200, This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors. AT91SAM9 and AT91CAP9 processors.
...@@ -322,6 +333,7 @@ config ARCH_CLPS711X ...@@ -322,6 +333,7 @@ config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based" bool "Cirrus Logic CLPS711x/EP721x-based"
select CPU_ARM720T select CPU_ARM720T
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
Support for Cirrus Logic 711x/721x based boards. Support for Cirrus Logic 711x/721x based boards.
...@@ -362,6 +374,7 @@ config ARCH_EBSA110 ...@@ -362,6 +374,7 @@ config ARCH_EBSA110
select ISA select ISA
select NO_IOPORT select NO_IOPORT
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
This is an evaluation board for the StrongARM processor available This is an evaluation board for the StrongARM processor available
from Digital. It has limited hardware on-board, including an from Digital. It has limited hardware on-board, including an
...@@ -377,6 +390,7 @@ config ARCH_EP93XX ...@@ -377,6 +390,7 @@ config ARCH_EP93XX
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
This enables support for the Cirrus EP93xx series of CPUs. This enables support for the Cirrus EP93xx series of CPUs.
...@@ -385,6 +399,7 @@ config ARCH_FOOTBRIDGE ...@@ -385,6 +399,7 @@ config ARCH_FOOTBRIDGE
select CPU_SA110 select CPU_SA110
select FOOTBRIDGE select FOOTBRIDGE
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select NEED_MACH_MEMORY_H
help help
Support for systems based on the DC21285 companion chip Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
...@@ -434,6 +449,7 @@ config ARCH_IOP13XX ...@@ -434,6 +449,7 @@ config ARCH_IOP13XX
select PCI select PCI
select ARCH_SUPPORTS_MSI select ARCH_SUPPORTS_MSI
select VMSPLIT_1G select VMSPLIT_1G
select NEED_MACH_MEMORY_H
help help
Support for Intel's IOP13XX (XScale) family of processors. Support for Intel's IOP13XX (XScale) family of processors.
...@@ -464,6 +480,7 @@ config ARCH_IXP23XX ...@@ -464,6 +480,7 @@ config ARCH_IXP23XX
select CPU_XSC3 select CPU_XSC3
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
Support for Intel's IXP23xx (XScale) family of processors. Support for Intel's IXP23xx (XScale) family of processors.
...@@ -473,6 +490,7 @@ config ARCH_IXP2000 ...@@ -473,6 +490,7 @@ config ARCH_IXP2000
select CPU_XSCALE select CPU_XSCALE
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
Support for Intel's IXP2400/2800 (XScale) family of processors. Support for Intel's IXP2400/2800 (XScale) family of processors.
...@@ -566,6 +584,7 @@ config ARCH_KS8695 ...@@ -566,6 +584,7 @@ config ARCH_KS8695
select CPU_ARM922T select CPU_ARM922T
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
System-on-Chip devices. System-on-Chip devices.
...@@ -657,6 +676,7 @@ config ARCH_SHMOBILE ...@@ -657,6 +676,7 @@ config ARCH_SHMOBILE
select SPARSE_IRQ select SPARSE_IRQ
select MULTI_IRQ_HANDLER select MULTI_IRQ_HANDLER
select PM_GENERIC_DOMAINS if PM select PM_GENERIC_DOMAINS if PM
select NEED_MACH_MEMORY_H
help help
Support for Renesas's SH-Mobile and R-Mobile ARM platforms. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
...@@ -671,6 +691,7 @@ config ARCH_RPC ...@@ -671,6 +691,7 @@ config ARCH_RPC
select NO_IOPORT select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
On the Acorn Risc-PC, Linux can support the internal IDE disk and On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive. CD-ROM interface, serial and parallel port, and the floppy drive.
...@@ -689,6 +710,7 @@ config ARCH_SA1100 ...@@ -689,6 +710,7 @@ config ARCH_SA1100
select HAVE_SCHED_CLOCK select HAVE_SCHED_CLOCK
select TICK_ONESHOT select TICK_ONESHOT
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select NEED_MACH_MEMORY_H
help help
Support for StrongARM 11x0 based boards. Support for StrongARM 11x0 based boards.
...@@ -781,6 +803,7 @@ config ARCH_S5PV210 ...@@ -781,6 +803,7 @@ config ARCH_S5PV210
select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
help help
Samsung S5PV210/S5PC110 series based systems Samsung S5PV210/S5PC110 series based systems
...@@ -797,6 +820,7 @@ config ARCH_EXYNOS4 ...@@ -797,6 +820,7 @@ config ARCH_EXYNOS4
select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
help help
Samsung EXYNOS4 series based systems Samsung EXYNOS4 series based systems
...@@ -808,6 +832,7 @@ config ARCH_SHARK ...@@ -808,6 +832,7 @@ config ARCH_SHARK
select ZONE_DMA select ZONE_DMA
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help help
Support for the StrongARM based Digital DNARD machine, also known Support for the StrongARM based Digital DNARD machine, also known
as "Shark" (<http://www.shark-linux.de/shark.html>). as "Shark" (<http://www.shark-linux.de/shark.html>).
...@@ -836,6 +861,7 @@ config ARCH_U300 ...@@ -836,6 +861,7 @@ config ARCH_U300
select HAVE_MACH_CLKDEV select HAVE_MACH_CLKDEV
select GENERIC_GPIO select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select NEED_MACH_MEMORY_H
help help
Support for ST-Ericsson U300 series mobile platforms. Support for ST-Ericsson U300 series mobile platforms.
......
...@@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ...@@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000
ifeq ($(CONFIG_ARCH_SA1100),y) ifeq ($(CONFIG_ARCH_SA1100),y)
textofs-$(CONFIG_SA1111) := 0x00208000 textofs-$(CONFIG_SA1111) := 0x00208000
endif endif
textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
# Machine directory name. This list is sorted alphanumerically # Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name. # by CONFIG_* macro name.
......
...@@ -205,6 +205,13 @@ extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *, ...@@ -205,6 +205,13 @@ extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
int dma_mmap_writecombine(struct device *, struct vm_area_struct *, int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
void *, dma_addr_t, size_t); void *, dma_addr_t, size_t);
/*
* This can be called during boot to increase the size of the consistent
* DMA region above it's default value of 2MB. It must be called before the
* memory allocator is initialised, i.e. before any core_initcall.
*/
extern void __init init_consistent_dma_size(unsigned long size);
#ifdef CONFIG_DMABOUNCE #ifdef CONFIG_DMABOUNCE
/* /*
......
...@@ -17,7 +17,7 @@ struct sys_timer; ...@@ -17,7 +17,7 @@ struct sys_timer;
struct machine_desc { struct machine_desc {
unsigned int nr; /* architecture number */ unsigned int nr; /* architecture number */
const char *name; /* architecture name */ const char *name; /* architecture name */
unsigned long boot_params; /* tagged list */ unsigned long atag_offset; /* tagged list (relative) */
const char **dt_compat; /* array of device tree const char **dt_compat; /* array of device tree
* 'compatible' strings */ * 'compatible' strings */
......
...@@ -16,9 +16,12 @@ ...@@ -16,9 +16,12 @@
#include <linux/compiler.h> #include <linux/compiler.h>
#include <linux/const.h> #include <linux/const.h>
#include <linux/types.h> #include <linux/types.h>
#include <mach/memory.h>
#include <asm/sizes.h> #include <asm/sizes.h>
#ifdef CONFIG_NEED_MACH_MEMORY_H
#include <mach/memory.h>
#endif
/* /*
* Allow for constants defined here to be used from assembly code * Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation. * by prepending the UL suffix only with actual C code compilation.
...@@ -77,16 +80,7 @@ ...@@ -77,16 +80,7 @@
*/ */
#define IOREMAP_MAX_ORDER 24 #define IOREMAP_MAX_ORDER 24
/*
* Size of DMA-consistent memory region. Must be multiple of 2M,
* between 2MB and 14MB inclusive.
*/
#ifndef CONSISTENT_DMA_SIZE
#define CONSISTENT_DMA_SIZE SZ_2M
#endif
#define CONSISTENT_END (0xffe00000UL) #define CONSISTENT_END (0xffe00000UL)
#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE)
#else /* CONFIG_MMU */ #else /* CONFIG_MMU */
...@@ -160,7 +154,6 @@ ...@@ -160,7 +154,6 @@
* so that all we need to do is modify the 8-bit constant field. * so that all we need to do is modify the 8-bit constant field.
*/ */
#define __PV_BITS_31_24 0x81000000 #define __PV_BITS_31_24 0x81000000
#define __PV_BITS_23_16 0x00810000
extern unsigned long __pv_phys_offset; extern unsigned long __pv_phys_offset;
#define PHYS_OFFSET __pv_phys_offset #define PHYS_OFFSET __pv_phys_offset
...@@ -178,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x) ...@@ -178,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x)
{ {
unsigned long t; unsigned long t;
__pv_stub(x, t, "add", __PV_BITS_31_24); __pv_stub(x, t, "add", __PV_BITS_31_24);
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
__pv_stub(t, t, "add", __PV_BITS_23_16);
#endif
return t; return t;
} }
...@@ -188,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) ...@@ -188,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
{ {
unsigned long t; unsigned long t;
__pv_stub(x, t, "sub", __PV_BITS_31_24); __pv_stub(x, t, "sub", __PV_BITS_31_24);
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
__pv_stub(t, t, "sub", __PV_BITS_23_16);
#endif
return t; return t;
} }
#else #else
...@@ -200,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x) ...@@ -200,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x)
#endif #endif
#ifndef PHYS_OFFSET #ifndef PHYS_OFFSET
#ifdef PLAT_PHYS_OFFSET
#define PHYS_OFFSET PLAT_PHYS_OFFSET #define PHYS_OFFSET PLAT_PHYS_OFFSET
#else
#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
#endif
#endif #endif
/* /*
......
...@@ -31,11 +31,7 @@ struct mod_arch_specific { ...@@ -31,11 +31,7 @@ struct mod_arch_specific {
/* Add __virt_to_phys patching state as well */ /* Add __virt_to_phys patching state as well */
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
#else
#define MODULE_ARCH_VERMAGIC_P2V "p2v8 " #define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
#endif
#else #else
#define MODULE_ARCH_VERMAGIC_P2V "" #define MODULE_ARCH_VERMAGIC_P2V ""
#endif #endif
......
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
#if defined(CONFIG_DEBUG_ICEDCC) #if defined(CONFIG_DEBUG_ICEDCC)
@@ debug using ARM EmbeddedICE DCC channel @@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rp, rv .macro addruart, rp, rv, tmp
.endm .endm
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
...@@ -106,7 +106,7 @@ ...@@ -106,7 +106,7 @@
#ifdef CONFIG_MMU #ifdef CONFIG_MMU
.macro addruart_current, rx, tmp1, tmp2 .macro addruart_current, rx, tmp1, tmp2
addruart \tmp1, \tmp2 addruart \tmp1, \tmp2, \rx
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rx, c1, c0
tst \rx, #1 tst \rx, #1
moveq \rx, \tmp1 moveq \rx, \tmp1
......
...@@ -95,7 +95,7 @@ ENTRY(stext) ...@@ -95,7 +95,7 @@ ENTRY(stext)
sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
add r8, r8, r4 @ PHYS_OFFSET add r8, r8, r4 @ PHYS_OFFSET
#else #else
ldr r8, =PLAT_PHYS_OFFSET ldr r8, =PHYS_OFFSET @ always constant in this case
#endif #endif
/* /*
...@@ -234,7 +234,7 @@ __create_page_tables: ...@@ -234,7 +234,7 @@ __create_page_tables:
* This allows debug messages to be output * This allows debug messages to be output
* via a serial console before paging_init. * via a serial console before paging_init.
*/ */
addruart r7, r3 addruart r7, r3, r0
mov r3, r3, lsr #20 mov r3, r3, lsr #20
mov r3, r3, lsl #2 mov r3, r3, lsl #2
...@@ -488,13 +488,8 @@ __fixup_pv_table: ...@@ -488,13 +488,8 @@ __fixup_pv_table:
add r5, r5, r3 @ adjust table end address add r5, r5, r3 @ adjust table end address
add r7, r7, r3 @ adjust __pv_phys_offset address add r7, r7, r3 @ adjust __pv_phys_offset address
str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset
#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
mov r6, r3, lsr #24 @ constant for add/sub instructions mov r6, r3, lsr #24 @ constant for add/sub instructions
teq r3, r6, lsl #24 @ must be 16MiB aligned teq r3, r6, lsl #24 @ must be 16MiB aligned
#else
mov r6, r3, lsr #16 @ constant for add/sub instructions
teq r3, r6, lsl #16 @ must be 64kiB aligned
#endif
THUMB( it ne @ cross section branch ) THUMB( it ne @ cross section branch )
bne __error bne __error
str r6, [r7, #4] @ save to __pv_offset str r6, [r7, #4] @ save to __pv_offset
...@@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table) ...@@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table)
.text .text
__fixup_a_pv_table: __fixup_a_pv_table:
#ifdef CONFIG_THUMB2_KERNEL #ifdef CONFIG_THUMB2_KERNEL
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT lsls r6, #24
lsls r0, r6, #24 beq 2f
lsr r6, #8
beq 1f
clz r7, r0
lsr r0, #24
lsl r0, r7
bic r0, 0x0080
lsrs r7, #1
orrcs r0, #0x0080
orr r0, r0, r7, lsl #12
#endif
1: lsls r6, #24
beq 4f
clz r7, r6 clz r7, r6
lsr r6, #24 lsr r6, #24
lsl r6, r7 lsl r6, r7
...@@ -532,43 +515,25 @@ __fixup_a_pv_table: ...@@ -532,43 +515,25 @@ __fixup_a_pv_table:
orrcs r6, #0x0080 orrcs r6, #0x0080
orr r6, r6, r7, lsl #12 orr r6, r6, r7, lsl #12
orr r6, #0x4000 orr r6, #0x4000
b 4f b 2f
2: @ at this point the C flag is always clear 1: add r7, r3
add r7, r3 ldrh ip, [r7, #2]
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
ldrh ip, [r7]
tst ip, 0x0400 @ the i bit tells us LS or MS byte
beq 3f
cmp r0, #0 @ set C flag, and ...
biceq ip, 0x0400 @ immediate zero value has a special encoding
streqh ip, [r7] @ that requires the i bit cleared
#endif
3: ldrh ip, [r7, #2]
and ip, 0x8f00 and ip, 0x8f00
orrcc ip, r6 @ mask in offset bits 31-24 orr ip, r6 @ mask in offset bits 31-24
orrcs ip, r0 @ mask in offset bits 23-16
strh ip, [r7, #2] strh ip, [r7, #2]
4: cmp r4, r5 2: cmp r4, r5
ldrcc r7, [r4], #4 @ use branch for delay slot ldrcc r7, [r4], #4 @ use branch for delay slot
bcc 2b bcc 1b
bx lr bx lr
#else #else
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT b 2f
and r0, r6, #255 @ offset bits 23-16 1: ldr ip, [r7, r3]
mov r6, r6, lsr #8 @ offset bits 31-24
#else
mov r0, #0 @ just in case...
#endif
b 3f
2: ldr ip, [r7, r3]
bic ip, ip, #0x000000ff bic ip, ip, #0x000000ff
tst ip, #0x400 @ rotate shift tells us LS or MS byte orr ip, ip, r6 @ mask in offset bits 31-24
orrne ip, ip, r6 @ mask in offset bits 31-24
orreq ip, ip, r0 @ mask in offset bits 23-16
str ip, [r7, r3] str ip, [r7, r3]
3: cmp r4, r5 2: cmp r4, r5
ldrcc r7, [r4], #4 @ use branch for delay slot ldrcc r7, [r4], #4 @ use branch for delay slot
bcc 2b bcc 1b
mov pc, lr mov pc, lr
#endif #endif
ENDPROC(__fixup_a_pv_table) ENDPROC(__fixup_a_pv_table)
......
...@@ -820,25 +820,8 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr) ...@@ -820,25 +820,8 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)