Commit 541c571f authored by Praveen Madhavan's avatar Praveen Madhavan Committed by David S. Miller

csiostor:Use firmware version from cxgb4/t4fw_version.h

This patch is to use firmware version macros from t4fw_version.h
and also enables 40g T5 adapter.
Signed-off-by: default avatarPraveen Madhavan <praveenm@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b5057dd7
......@@ -1372,7 +1372,8 @@ csio_config_device_caps(struct csio_hw *hw)
}
/* Validate device capabilities */
if (csio_hw_validate_caps(hw, mbp))
rv = csio_hw_validate_caps(hw, mbp);
if (rv != 0)
goto out;
/* Don't config device capabilities if already configured */
......@@ -1776,7 +1777,8 @@ csio_hw_use_fwconfig(struct csio_hw *hw, int reset, u32 *fw_cfg_param)
}
/* Validate device capabilities */
if (csio_hw_validate_caps(hw, mbp))
rv = csio_hw_validate_caps(hw, mbp);
if (rv != 0)
goto bye;
/*
* Note that we're operating with parameters
......
......@@ -45,11 +45,6 @@
#define FW_FNAME_T5 "cxgb4/t5fw.bin"
#define FW_CFG_NAME_T5 "cxgb4/t5-config.txt"
#define T5FW_VERSION_MAJOR 0x01
#define T5FW_VERSION_MINOR 0x0B
#define T5FW_VERSION_MICRO 0x1B
#define T5FW_VERSION_BUILD 0x00
#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
#define CHELSIO_CHIP_FPGA 0x100
#define CHELSIO_CHIP_VERSION(code) (((code) >> 12) & 0xf)
......@@ -74,6 +69,7 @@ static inline int csio_is_t5(uint16_t chip)
{ PCI_VENDOR_ID_CHELSIO, (devid), PCI_ANY_ID, PCI_ANY_ID, 0, 0, (idx) }
#include "t4fw_api.h"
#include "t4fw_version.h"
#define FW_VERSION(chip) ( \
FW_HDR_FW_VER_MAJOR_G(chip##FW_VERSION_MAJOR) | \
......
......@@ -327,7 +327,8 @@ csio_mb_caps_config(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
}
#define CSIO_ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\
FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_ANEG)
FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G |\
FW_PORT_CAP_ANEG)
/*
* csio_mb_port- FW PORT command helper
......
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