Commit 4bb1a108 authored by David Daney's avatar David Daney Committed by Ralf Baechle

MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h

We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove
it to mach-cavium-octeon/cpu-feature-overrides.h
Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent fbeda19f
......@@ -53,6 +53,7 @@
#define cpu_has_userlocal 0
#define cpu_has_vint 0
#define cpu_has_veic 0
#define cpu_hwrena_impl_bits 0xc0000000
#define ARCH_HAS_READ_CURRENT_TIMER 1
#define ARCH_HAS_IRQ_PER_CPU 1
#define ARCH_HAS_SPINLOCK_PREFETCH 1
......
......@@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void)
write_c0_hwrena(enable);
}
#ifdef CONFIG_CPU_CAVIUM_OCTEON
write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */
#endif
#ifdef CONFIG_MIPS_MT_SMTC
if (!secondaryTC) {
#endif /* CONFIG_MIPS_MT_SMTC */
......
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