Commit 4ba3f7c5 authored by Russell King's avatar Russell King Committed by Russell King

[ARM] mm: allow LH7A40x to use sparsemem

Enable Sparsemem support for LH7A40x SoCs, while still allowing the
existing discontig support for the time being.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 07a2f737
......@@ -510,6 +510,8 @@ config ARCH_SHARK
config ARCH_LH7A40X
bool "Sharp LH7A40X"
select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
help
Say Y here for systems based on one of the Sharp LH7A40X
System on a Chip processors. These CPUs include an ARM922T
......@@ -842,12 +844,6 @@ config OABI_COMPAT
# Discontigmem is deprecated
config ARCH_DISCONTIGMEM_ENABLE
bool
default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
help
Say Y to support efficient handling of discontiguous physical memory,
for architectures which are either NUMA (Non-Uniform Memory Access)
or have huge holes in the physical address space for other reasons.
See <file:Documentation/vm/numa> for more.
config ARCH_SPARSEMEM_ENABLE
bool
......
......@@ -40,23 +40,22 @@ config LPD7A40X_CPLD_SSP
bool
config LH7A40X_CONTIGMEM
bool "Disable NUMA Support"
depends on ARCH_LH7A40X
bool "Disable NUMA/SparseMEM Support"
help
Say Y here if your bootloader sets the SROMLL bit(s) in
the SDRAM controller, organizing memory as a contiguous
array. This option will disable CONFIG_DISCONTIGMEM and
force the kernel to manage all memory in one node.
array. This option will disable sparse memory support
and force the kernel to manage all memory in one node.
Setting this option incorrectly may prevent the kernel from
booting. It is OK to leave it N.
Setting this option incorrectly may prevent the kernel
from booting. It is OK to leave it N.
For more information, consult
<file:Documentation/arm/Sharp-LH/SDRAM>.
config LH7A40X_ONE_BANK_PER_NODE
bool "Optimize NUMA Node Tables for Size"
depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM
depends on !LH7A40X_CONTIGMEM
help
Say Y here to produce compact memory node tables. By
default pairs of adjacent physical RAM banks are managed
......
......@@ -73,4 +73,10 @@
#endif
/*
* Sparsemem version of the above
*/
#define MAX_PHYSMEM_BITS 32
#define SECTION_SIZE_BITS 24
#endif
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