Commit 37820108 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc fixes from Olof Johansson:
 "A set of fixes and some minor cleanups for -rc2:

   - A series from Arnd that fixes warnings in drivers and other code
     included by ARM defconfigs.  Most have been acked by corresponding
     maintainers (and seem quite hard to argue not picking up anyway in
     the few exception cases).
   - A few misc patches from the list for integrator/vt8500/i.MX
   - A batch of fixes to OMAP platforms, fixing:
     - boot problems on beaglebone,
     - regression fixes for local timers
     - clockdomain locking fixes
     - a few boot/sparse warnings
   - For Tegra:
     - Clock rate calculation overflow fix
     - Revert a change that removed timer clocks and a fix for symbol
       name clashes
   - For Renesas:
     - IO accessor / annotation cleanups to remove warnings
   - For Kirkwood/Dove/mvebu:
     - Fixes for device trees for Dove (some minor cleanups, some fixes)
     - Fixes for the mvebu gpio driver
     - Fix build problem for Feroceon due to missing ifdefs
     - Fix lsxl DTS files"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
  ARM: kirkwood: fix buttons on lsxl boards
  ARM: kirkwood: fix LEDs names for lsxl boards
  ARM: Kirkwood: fix disabling CACHE_FEROCEON_L2
  gpio: mvebu: Add missing breaks in mvebu_gpio_irq_set_type
  ARM: dove: Add crypto engine to DT
  ARM: dove: Remove watchdog from DT
  ARM: dove: Restructure SoC device tree descriptor
  ARM: dove: Fix clock names of sata and gbe
  ARM: dove: Fix tauros2 device tree init
  ARM: dove: Add pcie clock support
  ARM: OMAP2+: Allow kernel to boot even if GPMC fails to reserve memory
  ARM: OMAP: clockdomain: Fix locking on _clkdm_clk_hwmod_enable / disable
  ARM: s3c: mark s3c2440_clk_add as __init_refok
  spi/s3c64xx: use correct dma_transfer_direction type
  ARM: OMAP4: devices: fixup OMAP4 DMIC platform device error message
  ARM: OMAP2+: clock data: Add dev-id for the omap-gpmc dummy fck
  ARM: OMAP: resolve sparse warning concerning debug_card_init()
  ARM: OMAP4: Fix twd_local_timer_register regression
  ARM: tegra: add tegra_timer clock
  ARM: tegra: rename tegra system timer
  ...
parents caabe240 70f3900e
......@@ -25,6 +25,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-trats.dtb \
exynos5250-smdk5250.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
integratorcp.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
kirkwood-dns325.dtb \
......
......@@ -4,21 +4,32 @@
compatible = "marvell,dove";
model = "Marvell Armada 88AP510 SoC";
interrupt-parent = <&intc>;
intc: interrupt-controller {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xf1020204 0x04>,
<0xf1020214 0x04>;
};
mbus@f1000000 {
soc@f1000000 {
compatible = "simple-bus";
ranges = <0 0xf1000000 0x4000000>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
l2: l2-cache {
compatible = "marvell,tauros2-cache";
marvell,tauros2-cache-features = <0>;
};
intc: interrupt-controller {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x20204 0x04>, <0x20214 0x04>;
};
uart0: serial@12000 {
compatible = "ns16550a";
......@@ -56,11 +67,6 @@
status = "disabled";
};
wdt: wdt@20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
};
gpio0: gpio@d0400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
......@@ -139,5 +145,14 @@
nr-ports = <1>;
status = "disabled";
};
crypto: crypto@30000 {
compatible = "marvell,orion-crypto";
reg = <0x30000 0x10000>,
<0xc8000000 0x800>;
reg-names = "regs", "sram";
interrupts = <31>;
status = "okay";
};
};
};
......@@ -37,6 +37,13 @@
pinctrl_hog: hoggrp {
fsl,pins = <
176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */
>;
};
};
arm2 {
pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
fsl,pins = <
1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */
1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */
>;
......@@ -58,7 +65,8 @@
wp-gpios = <&gpio6 14 0>;
vmmc-supply = <&reg_3p3v>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_1>;
pinctrl-0 = <&pinctrl_usdhc3_1
&pinctrl_usdhc3_arm2>;
status = "okay";
};
......
......@@ -48,17 +48,19 @@
#size-cells = <0>;
button@1 {
label = "Function Button";
linux,code = <132>;
linux,code = <357>;
gpios = <&gpio1 9 1>;
};
button@2 {
label = "Power-on Switch";
linux,code = <116>;
linux,code = <0>;
linux,input-type = <5>;
gpios = <&gpio1 10 1>;
};
button@3 {
label = "Power-auto Switch";
linux,code = <142>;
linux,code = <1>;
linux,input-type = <5>;
gpios = <&gpio1 11 1>;
};
};
......@@ -67,28 +69,28 @@
compatible = "gpio-leds";
led@1 {
label = "lschlv2:blue:func";
label = "lsxl:blue:func";
gpios = <&gpio1 4 1>;
};
led@2 {
label = "lschlv2:red:alarm";
label = "lsxl:red:alarm";
gpios = <&gpio1 5 1>;
};
led@3 {
label = "lschlv2:amber:info";
label = "lsxl:amber:info";
gpios = <&gpio1 6 1>;
};
led@4 {
label = "lschlv2:blue:power";
label = "lsxl:blue:power";
gpios = <&gpio1 7 1>;
linux,default-trigger = "default-on";
};
led@5 {
label = "lschlv2:red:func";
label = "lsxl:red:func";
gpios = <&gpio1 16 1>;
};
};
......
......@@ -71,13 +71,13 @@
ehci@d8007100 {
compatible = "via,vt8500-ehci";
reg = <0xd8007100 0x200>;
interrupts = <43>;
interrupts = <1>;
};
uhci@d8007300 {
compatible = "platform-uhci";
reg = <0xd8007300 0x200>;
interrupts = <43>;
interrupts = <0>;
};
fb@d8050800 {
......
......@@ -32,6 +32,7 @@
#include <linux/irq.h>
#include <plat/time.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <plat/irq.h>
#include <plat/common.h>
#include <plat/addr-map.h>
#include "common.h"
......@@ -109,8 +110,8 @@ static void __init dove_clk_init(void)
orion_clkdev_add(NULL, "orion-ehci.0", usb0);
orion_clkdev_add(NULL, "orion-ehci.1", usb1);
orion_clkdev_add(NULL, "mv643xx_eth.0", ge);
orion_clkdev_add("0", "sata_mv.0", sata);
orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge);
orion_clkdev_add(NULL, "sata_mv.0", sata);
orion_clkdev_add("0", "pcie", pex0);
orion_clkdev_add("1", "pcie", pex1);
orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
......@@ -399,7 +400,7 @@ static void __init dove_dt_init(void)
(dove_tclk + 499999) / 1000000);
#ifdef CONFIG_CACHE_TAUROS2
tauros2_init();
tauros2_init(0);
#endif
dove_setup_cpu_mbus();
......@@ -415,7 +416,6 @@ static void __init dove_dt_init(void)
dove_ehci0_init();
dove_ehci1_init();
dove_pcie_init(1, 1);
dove_crypto_init();
of_platform_populate(NULL, of_default_bus_match_table,
dove_auxdata_lookup, NULL);
......
......@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/clk.h>
#include <video/vga.h>
#include <asm/mach/pci.h>
#include <asm/mach/arch.h>
......@@ -188,6 +189,10 @@ static void __init add_pcie_port(int index, void __iomem *base)
if (orion_pcie_link_up(base)) {
struct pcie_port *pp = &pcie_port[num_pcie_ports++];
struct clk *clk = clk_get_sys("pcie", (index ? "1" : "0"));
if (!IS_ERR(clk))
clk_prepare_enable(clk);
printk(KERN_INFO "link up\n");
......
......@@ -51,9 +51,7 @@ static void __init kirkwood_dt_init(void)
kirkwood_setup_cpu_mbus();
#ifdef CONFIG_CACHE_FEROCEON_L2
kirkwood_l2_init();
#endif
/* Setup root of clk tree */
kirkwood_clk_init();
......
......@@ -633,6 +633,7 @@ char * __init kirkwood_id(void)
void __init kirkwood_l2_init(void)
{
#ifdef CONFIG_CACHE_FEROCEON_L2
#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
feroceon_l2_init(1);
......@@ -640,6 +641,7 @@ void __init kirkwood_l2_init(void)
writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
feroceon_l2_init(0);
#endif
#endif
}
void __init kirkwood_init(void)
......@@ -657,9 +659,7 @@ void __init kirkwood_init(void)
kirkwood_setup_cpu_mbus();
#ifdef CONFIG_CACHE_FEROCEON_L2
kirkwood_l2_init();
#endif
/* Setup root of clk tree */
kirkwood_clk_init();
......
......@@ -3294,7 +3294,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X),
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X),
CLK("omap-gpmc", "fck", &dummy_ck, CK_443X),
CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X),
CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
......
......@@ -925,15 +925,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable)
return -EINVAL;
spin_lock_irqsave(&clkdm->lock, flags);
/*
* For arch's with no autodeps, clkcm_clk_enable
* should be called for every clock instance or hwmod that is
* enabled, so the clkdm can be force woken up.
*/
if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps)
if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) {
spin_unlock_irqrestore(&clkdm->lock, flags);
return 0;
}
spin_lock_irqsave(&clkdm->lock, flags);
arch_clkdm->clkdm_clk_enable(clkdm);
pwrdm_state_switch(clkdm->pwrdm.ptr);
spin_unlock_irqrestore(&clkdm->lock, flags);
......@@ -950,15 +953,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm)
if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
return -EINVAL;
spin_lock_irqsave(&clkdm->lock, flags);
if (atomic_read(&clkdm->usecount) == 0) {
spin_unlock_irqrestore(&clkdm->lock, flags);
WARN_ON(1); /* underflow */
return -ERANGE;
}
if (atomic_dec_return(&clkdm->usecount) > 0)
if (atomic_dec_return(&clkdm->usecount) > 0) {
spin_unlock_irqrestore(&clkdm->lock, flags);
return 0;
}
spin_lock_irqsave(&clkdm->lock, flags);
arch_clkdm->clkdm_clk_disable(clkdm);
pwrdm_state_switch(clkdm->pwrdm.ptr);
spin_unlock_irqrestore(&clkdm->lock, flags);
......
......@@ -341,7 +341,7 @@ static void __init omap_init_dmic(void)
oh = omap_hwmod_lookup("dmic");
if (!oh) {
printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
pr_err("Could not look up dmic hw_mod\n");
return;
}
......
......@@ -868,9 +868,9 @@ static void __devexit gpmc_mem_exit(void)
}
static void __devinit gpmc_mem_init(void)
static int __devinit gpmc_mem_init(void)
{
int cs;
int cs, rc;
unsigned long boot_rom_space = 0;
/* never allocate the first page, to facilitate bug detection;
......@@ -890,13 +890,21 @@ static void __devinit gpmc_mem_init(void)
if (!gpmc_cs_mem_enabled(cs))
continue;
gpmc_cs_get_memconf(cs, &base, &size);
if (gpmc_cs_insert_mem(cs, base, size) < 0)
BUG();
rc = gpmc_cs_insert_mem(cs, base, size);
if (IS_ERR_VALUE(rc)) {
while (--cs >= 0)
if (gpmc_cs_mem_enabled(cs))
gpmc_cs_delete_mem(cs);
return rc;
}
}
return 0;
}
static __devinit int gpmc_probe(struct platform_device *pdev)
{
int rc;
u32 l;
struct resource *res;
......@@ -936,7 +944,13 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
GPMC_REVISION_MINOR(l));
gpmc_mem_init();
rc = gpmc_mem_init();
if (IS_ERR_VALUE(rc)) {
clk_disable_unprepare(gpmc_l3_clk);
clk_put(gpmc_l3_clk);
dev_err(gpmc_dev, "failed to reserve memory\n");
return rc;
}
if (IS_ERR_VALUE(gpmc_setup_irq()))
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
......
......@@ -467,7 +467,7 @@ OMAP_SYS_TIMER(3_am33xx)
#ifdef CONFIG_ARCH_OMAP4
#ifdef CONFIG_LOCAL_TIMERS
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START);
OMAP44XX_LOCAL_TWD_BASE, 29);
#endif
static void __init omap4_timer_init(void)
......
......@@ -163,7 +163,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
};
static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
{
struct clk *clock_upll;
struct clk *clock_h;
......
......@@ -1196,7 +1196,7 @@ static void __init eva_init(void)
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 32K*8way */
l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
#endif
i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
......
......@@ -24,17 +24,17 @@
#include <linux/clkdev.h>
#include <mach/common.h>
#define FRQMR 0xffc80014
#define MSTPCR0 0xffc80030
#define MSTPCR1 0xffc80034
#define MSTPCR3 0xffc8003c
#define MSTPSR1 0xffc80044
#define MSTPSR4 0xffc80048
#define MSTPSR6 0xffc8004c
#define MSTPCR4 0xffc80050
#define MSTPCR5 0xffc80054
#define MSTPCR6 0xffc80058
#define MSTPCR7 0xffc80040
#define FRQMR IOMEM(0xffc80014)
#define MSTPCR0 IOMEM(0xffc80030)
#define MSTPCR1 IOMEM(0xffc80034)
#define MSTPCR3 IOMEM(0xffc8003c)
#define MSTPSR1 IOMEM(0xffc80044)
#define MSTPSR4 IOMEM(0xffc80048)
#define MSTPSR6 IOMEM(0xffc8004c)
#define MSTPCR4 IOMEM(0xffc80050)
#define MSTPCR5 IOMEM(0xffc80054)
#define MSTPCR6 IOMEM(0xffc80058)
#define MSTPCR7 IOMEM(0xffc80040)
/* ioremap() through clock mapping mandatory to avoid
* collision with ARM coherent DMA virtual memory range.
......
......@@ -182,7 +182,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
.init_early = tegra20_init_early,
.init_irq = tegra_dt_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.timer = &tegra_sys_timer,
.init_machine = tegra_dt_init,
.init_late = tegra_dt_init_late,
.restart = tegra_assert_system_reset,
......
......@@ -89,7 +89,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
.init_early = tegra30_init_early,
.init_irq = tegra_dt_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.timer = &tegra_sys_timer,
.init_machine = tegra30_dt_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
......
......@@ -55,5 +55,5 @@ static inline int harmony_pcie_init(void) { return 0; }
void __init tegra_paz00_wifikill_init(void);
extern struct sys_timer tegra_timer;
extern struct sys_timer tegra_sys_timer;
#endif
......@@ -953,6 +953,7 @@ PERIPH_CLK(pcie_xclk, NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m,
static struct clk *tegra_list_clks[] = {
&tegra_apbdma,
&tegra_rtc,
&tegra_timer,
&tegra_i2s1,
&tegra_i2s2,
&tegra_spdif_out,
......
......@@ -1199,7 +1199,7 @@ static long tegra30_pll_round_rate(struct clk_hw *hw, unsigned long rate,
{
struct clk_tegra *c = to_clk_tegra(hw);
unsigned long input_rate = *prate;
unsigned long output_rate = *prate;
u64 output_rate = *prate;
const struct clk_pll_freq_table *sel;
struct clk_pll_freq_table cfg;
int mul;
......
......@@ -1143,6 +1143,7 @@ struct clk *tegra_list_clks[] = {
&tegra_apbdma,
&tegra_rtc,
&tegra_kbc,
&tegra_timer,
&tegra_kfuse,
&tegra_fuse,
&tegra_fuse_burn,
......
......@@ -245,7 +245,7 @@ static void __init tegra_init_timer(void)
register_persistent_clock(NULL, tegra_read_persistent_clock);
}
struct sys_timer tegra_timer = {
struct sys_timer tegra_sys_timer = {
.init = tegra_init_timer,
};
......
......@@ -16,6 +16,7 @@
#include <linux/smc91x.h>
#include <mach/hardware.h>
#include "../mach-omap2/debug-devices.h"
/* Many OMAP development platforms reuse the same "debug board"; these
* platforms include H2, H3, H4, and Perseus2.
......
......@@ -381,11 +381,13 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
u &= ~(1 << pin);
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
break;
case IRQ_TYPE_EDGE_FALLING:
case IRQ_TYPE_LEVEL_LOW:
u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip));
u |= 1 << pin;
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
break;
case IRQ_TYPE_EDGE_BOTH: {
u32 v;
......@@ -401,6 +403,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type)
else
u &= ~(1 << pin); /* rising */
writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip));
break;
}
}
return 0;
......
......@@ -194,7 +194,7 @@ static void sharpsl_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
sharpsl_pcmcia_init_reset(skt);
}
static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = {
static struct pcmcia_low_level sharpsl_pcmcia_ops = {
.owner = THIS_MODULE,
.hw_init = sharpsl_pcmcia_hw_init,
.socket_state = sharpsl_pcmcia_socket_state,
......
......@@ -179,6 +179,7 @@ static void print_SCp(struct scsi_pointer *SCp, const char *prefix, const char *
SCp->buffers_residual, suffix);
}
#ifdef CHECK_STRUCTURE
static void fas216_dumpinfo(FAS216_Info *info)
{
static int used = 0;
......@@ -223,7 +224,6 @@ static void fas216_dumpinfo(FAS216_Info *info)
info->internal_done, info->magic_end);
}
#ifdef CHECK_STRUCTURE
static void __fas216_checkmagic(FAS216_Info *info, const char *func)
{
int corruption = 0;
......
......@@ -21,6 +21,7 @@
/*#define PSEUDO_DMA*/
#define OAKSCSI_PUBLIC_RELEASE 1
#define DONT_USE_INTR
#define priv(host) ((struct NCR5380_hostdata *)(host)->hostdata)
#define NCR5380_local_declare() void __iomem *_base
......
......@@ -132,7 +132,7 @@
struct s3c64xx_spi_dma_data {
unsigned ch;
enum dma_data_direction direction;
enum dma_transfer_direction direction;
enum dma_ch dmach;
struct property *dma_prop;
};
......@@ -1067,11 +1067,11 @@ static int __devinit s3c64xx_spi_get_dmares(
if (tx) {
dma_data = &sdd->tx_dma;
dma_data->direction = DMA_TO_DEVICE;
dma_data->direction = DMA_MEM_TO_DEV;
chan_str = "tx";
} else {
dma_data = &sdd->rx_dma;
dma_data->direction = DMA_FROM_DEVICE;
dma_data->direction = DMA_DEV_TO_MEM;
chan_str = "rx";
}
......
......@@ -160,7 +160,7 @@ static const struct hc_driver ehci_orion_hc_driver = {
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
static void __init
static void __devinit
ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
const struct mbus_dram_target_info *dram)
{
......
......@@ -429,7 +429,7 @@ static __always_inline void *
__do_kmalloc_node(size_t size, gfp_t gfp, int node, unsigned long caller)
{
unsigned int *m;
int align = max(A