Commit 30840244 authored by Chris Dearman's avatar Chris Dearman Committed by Ralf Baechle
Browse files

[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit


Signed-off-by: default avatarChris Dearman <chris@mips.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bdc94eb4
......@@ -295,15 +295,21 @@ void __init prom_init(void)
break;
case MIPS_REVISION_CORID_CORE_MSC:
case MIPS_REVISION_CORID_CORE_FPGA2:
case MIPS_REVISION_CORID_CORE_FPGA3:
case MIPS_REVISION_CORID_CORE_FPGA4:
case MIPS_REVISION_CORID_CORE_24K:
case MIPS_REVISION_CORID_CORE_EMUL_MSC:
/*
* SOCit/ROCit support is essentially identical
* but make an attempt to distinguish them
*/
mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
break;
case MIPS_REVISION_CORID_CORE_FPGA3:
case MIPS_REVISION_CORID_CORE_FPGA4:
case MIPS_REVISION_CORID_CORE_FPGA5:
case MIPS_REVISION_CORID_CORE_EMUL_MSC:
default:
mips_display_message("CC Error");
while (1); /* We die here... */
/* See above */
mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
break;
}
}
......
......@@ -68,6 +68,7 @@
#define MIPS_REVISION_CORID_CORE_FPGA3 9
#define MIPS_REVISION_CORID_CORE_24K 10
#define MIPS_REVISION_CORID_CORE_FPGA4 11
#define MIPS_REVISION_CORID_CORE_FPGA5 12
/**** Artificial corid defines ****/
/*
......
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