From 2bc35c1078fdfe7bb2a849c2d1bee8d9d5fea4a7 Mon Sep 17 00:00:00 2001
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Date: Wed, 1 Nov 2006 08:47:47 -0800
Subject: [PATCH] e1000: reorder pci-e infor struct
Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/e1000/e1000_hw.h | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 31bea3215841..f247f264a57b 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -128,11 +128,13 @@ typedef enum {
/* PCI bus widths */
typedef enum {
e1000_bus_width_unknown = 0,
+ /* These PCIe values should literally match the possible return values
+ * from config space */
+ e1000_bus_width_pciex_1 = 1,
+ e1000_bus_width_pciex_2 = 2,
+ e1000_bus_width_pciex_4 = 4,
e1000_bus_width_32,
e1000_bus_width_64,
- e1000_bus_width_pciex_1,
- e1000_bus_width_pciex_2,
- e1000_bus_width_pciex_4,
e1000_bus_width_reserved
} e1000_bus_width;
--
GitLab