Commit 195d1a96 authored by peter fuerst's avatar peter fuerst Committed by Ralf Baechle

MIPS: IP28: Change to build with -mr10k-cache-barrier=store

Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.
Signed-off-by: default avatarpeter fuerst <post@pfrst.de>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7e9e05ca
......@@ -473,12 +473,12 @@ endif
# Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys
#
ifdef CONFIG_SGI_IP28
ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n)
$(error gcc doesn't support needed option -mr10k-cache-barrier=1)
ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n)
$(error gcc doesn't support needed option -mr10k-cache-barrier=store)
endif
endif
core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/
cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28
cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28
load-$(CONFIG_SGI_IP28) += 0xa800000020004000
#
......
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