Commit 134f248b authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50: fix alignment of per-channel fifo cache



GPU pointer to the structure is shifted right by 10 bits, so we need to
align to 1024 bytes, not 256.
Reported-by: default avatarMaarten Maathuis <madman2003@gmail.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 71666475
...@@ -272,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan) ...@@ -272,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
return ret; return ret;
ramfc = chan->ramfc->gpuobj; ramfc = chan->ramfc->gpuobj;
ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 256, ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 1024,
0, &chan->cache); 0, &chan->cache);
if (ret) if (ret)
return ret; return ret;
......
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