Commit 0c325769 authored by Emmanuel Grumbach's avatar Emmanuel Grumbach Committed by John W. Linville
Browse files

iwlagn: move ISR related data to transport layer



Since the ISR is entirely in the transport layer, its data should be in the pcie
specific region.
Change sync_irq to first disable and then synchronize the IRQ.
iwl_isr and iwl_isr_ict now receive iwl_trans.
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 57210f7c
......@@ -3627,7 +3627,6 @@ int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops,
IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
priv->cfg = cfg;
priv->inta_mask = CSR_INI_SET_MASK;
/* is antenna coupling more than 35dB ? */
priv->bt_ant_couple_ok =
......@@ -3771,8 +3770,6 @@ out:
void __devexit iwl_remove(struct iwl_priv * priv)
{
unsigned long flags;
wait_for_completion(&priv->firmware_loading_complete);
IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
......@@ -3801,13 +3798,8 @@ void __devexit iwl_remove(struct iwl_priv * priv)
iwl_tt_exit(priv);
/* make sure we flush any pending irq or
* tasklet for the driver
*/
spin_lock_irqsave(&priv->shrd->lock, flags);
iwl_disable_interrupts(priv);
spin_unlock_irqrestore(&priv->shrd->lock, flags);
iwl_trans_sync_irq(trans(priv));
* tasklet for the driver */
iwl_trans_disable_sync_irq(trans(priv));
iwl_dealloc_ucode(priv);
......
......@@ -1259,6 +1259,7 @@ struct iwl_priv {
struct traffic_stats rx_stats;
/* counts interrupts */
/* TODO: move to the transport layer */
struct isr_statistics isr_stats;
struct iwl_power_mgr power_data;
......@@ -1315,14 +1316,6 @@ struct iwl_priv {
} accum_stats, delta_stats, max_delta_stats;
#endif
/* INT ICT Table */
__le32 *ict_tbl;
void *ict_tbl_vir;
dma_addr_t ict_tbl_dma;
dma_addr_t aligned_ict_tbl_dma;
int ict_index;
u32 inta;
bool use_ict;
/*
* reporting the number of tids has AGG on. 0 means
* no AGGREGATION
......@@ -1379,8 +1372,6 @@ struct iwl_priv {
struct iwl_rxon_context *cur_rssi_ctx;
bool bt_is_sco;
u32 inta_mask;
struct work_struct restart;
struct work_struct scan_completed;
struct work_struct abort_scan;
......@@ -1398,8 +1389,6 @@ struct iwl_priv {
struct work_struct bt_full_concurrency;
struct work_struct bt_runtime_config;
struct tasklet_struct irq_tasklet;
struct delayed_work scan_check;
/* TX Power */
......
......@@ -132,33 +132,12 @@ static inline void iwl_wake_any_queue(struct iwl_priv *priv,
#define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
static inline void iwl_disable_interrupts(struct iwl_priv *priv)
{
clear_bit(STATUS_INT_ENABLED, &priv->shrd->status);
/* disable interrupts from uCode/NIC to host */
iwl_write32(priv, CSR_INT_MASK, 0x00000000);
/* acknowledge/clear/reset any interrupts still pending
* from uCode or flow handler (Rx/Tx DMA) */
iwl_write32(priv, CSR_INT, 0xffffffff);
iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
IWL_DEBUG_ISR(priv, "Disabled interrupts\n");
}
static inline void iwl_enable_rfkill_int(struct iwl_priv *priv)
{
IWL_DEBUG_ISR(priv, "Enabling rfkill interrupt\n");
iwl_write32(priv, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
}
static inline void iwl_enable_interrupts(struct iwl_priv *priv)
{
IWL_DEBUG_ISR(priv, "Enabling interrupts\n");
set_bit(STATUS_INT_ENABLED, &priv->shrd->status);
iwl_write32(priv, CSR_INT_MASK, priv->inta_mask);
}
/**
* iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
* @priv -- pointer to iwl_priv data structure
......
......@@ -78,6 +78,18 @@ struct iwl_trans_pcie {
struct iwl_rx_queue rxq;
struct work_struct rx_replenish;
struct iwl_trans *trans;
/* INT ICT Table */
__le32 *ict_tbl;
void *ict_tbl_vir;
dma_addr_t ict_tbl_dma;
dma_addr_t aligned_ict_tbl_dma;
int ict_index;
u32 inta;
bool use_ict;
struct tasklet_struct irq_tasklet;
u32 inta_mask;
};
#define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \
......@@ -87,7 +99,7 @@ struct iwl_trans_pcie {
* RX
******************************************************/
void iwl_bg_rx_replenish(struct work_struct *data);
void iwl_irq_tasklet(struct iwl_priv *priv);
void iwl_irq_tasklet(struct iwl_trans *trans);
void iwlagn_rx_replenish(struct iwl_trans *trans);
void iwl_rx_queue_update_write_ptr(struct iwl_trans *trans,
struct iwl_rx_queue *q);
......@@ -96,12 +108,11 @@ void iwl_rx_queue_update_write_ptr(struct iwl_trans *trans,
* ICT
******************************************************/
int iwl_reset_ict(struct iwl_priv *priv);
void iwl_disable_ict(struct iwl_priv *priv);
int iwl_alloc_isr_ict(struct iwl_priv *priv);
void iwl_free_isr_ict(struct iwl_priv *priv);
void iwl_disable_ict(struct iwl_trans *trans);
int iwl_alloc_isr_ict(struct iwl_trans *trans);
void iwl_free_isr_ict(struct iwl_trans *trans);
irqreturn_t iwl_isr_ict(int irq, void *data);
/*****************************************************
* TX / HCMD
******************************************************/
......@@ -130,4 +141,28 @@ void iwl_trans_tx_queue_set_status(struct iwl_priv *priv,
void iwl_trans_pcie_txq_agg_setup(struct iwl_priv *priv, int sta_id, int tid,
int frame_limit);
static inline void iwl_disable_interrupts(struct iwl_trans *trans)
{
clear_bit(STATUS_INT_ENABLED, &trans->shrd->status);
/* disable interrupts from uCode/NIC to host */
iwl_write32(priv(trans), CSR_INT_MASK, 0x00000000);
/* acknowledge/clear/reset any interrupts still pending
* from uCode or flow handler (Rx/Tx DMA) */
iwl_write32(priv(trans), CSR_INT, 0xffffffff);
iwl_write32(priv(trans), CSR_FH_INT_STATUS, 0xffffffff);
IWL_DEBUG_ISR(trans, "Disabled interrupts\n");
}
static inline void iwl_enable_interrupts(struct iwl_trans *trans)
{
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
IWL_DEBUG_ISR(trans, "Enabling interrupts\n");
set_bit(STATUS_INT_ENABLED, &trans->shrd->status);
iwl_write32(priv(trans), CSR_INT_MASK, trans_pcie->inta_mask);
}
#endif /* __iwl_trans_int_pcie_h__ */
......@@ -711,7 +711,7 @@ static int iwl_trans_pcie_start_device(struct iwl_priv *priv)
if (iwl_is_rfkill(priv)) {
wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
iwl_enable_interrupts(priv);
iwl_enable_interrupts(trans(priv));
return -ERFKILL;
}
......@@ -730,7 +730,7 @@ static int iwl_trans_pcie_start_device(struct iwl_priv *priv)
/* clear (again), then enable host interrupts */
iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
iwl_enable_interrupts(priv);
iwl_enable_interrupts(trans(priv));
/* really make sure rfkill handshake bits are cleared */
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
......@@ -931,19 +931,14 @@ static int iwl_trans_tx_stop(struct iwl_priv *priv)
static void iwl_trans_pcie_stop_device(struct iwl_priv *priv)
{
unsigned long flags;
/* stop and reset the on-board processor */
iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
/* tell the device to stop sending interrupts */
spin_lock_irqsave(&priv->shrd->lock, flags);
iwl_disable_interrupts(priv);
spin_unlock_irqrestore(&priv->shrd->lock, flags);
iwl_trans_sync_irq(trans(priv));
iwl_trans_disable_sync_irq(trans(priv));
/* device going down, Stop using ICT table */
iwl_disable_ict(priv);
iwl_disable_ict(trans(priv));
/*
* If a HW restart happens during firmware loading,
......@@ -1132,19 +1127,20 @@ static int iwl_trans_pcie_request_irq(struct iwl_trans *trans)
{
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
struct iwl_priv *priv = priv(trans);
int err;
tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
iwl_irq_tasklet, (unsigned long)priv);
trans_pcie->inta_mask = CSR_INI_SET_MASK;
tasklet_init(&trans_pcie->irq_tasklet, (void (*)(unsigned long))
iwl_irq_tasklet, (unsigned long)trans);
iwl_alloc_isr_ict(priv);
iwl_alloc_isr_ict(trans);
err = request_irq(bus(trans)->irq, iwl_isr_ict, IRQF_SHARED,
DRV_NAME, priv);
DRV_NAME, trans);
if (err) {
IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus->irq);
iwl_free_isr_ict(priv);
IWL_ERR(trans, "Error allocating IRQ %d\n", bus(trans)->irq);
iwl_free_isr_ict(trans);
return err;
}
......@@ -1152,17 +1148,25 @@ static int iwl_trans_pcie_request_irq(struct iwl_trans *trans)
return 0;
}
static void iwl_trans_pcie_sync_irq(struct iwl_priv *priv)
static void iwl_trans_pcie_disable_sync_irq(struct iwl_trans *trans)
{
unsigned long flags;
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
spin_lock_irqsave(&trans->shrd->lock, flags);
iwl_disable_interrupts(trans);
spin_unlock_irqrestore(&trans->shrd->lock, flags);
/* wait to make sure we flush pending tasklet*/
synchronize_irq(priv->bus->irq);
tasklet_kill(&priv->irq_tasklet);
synchronize_irq(bus(trans)->irq);
tasklet_kill(&trans_pcie->irq_tasklet);
}
static void iwl_trans_pcie_free(struct iwl_priv *priv)
{
free_irq(priv->bus->irq, priv);
iwl_free_isr_ict(priv);
free_irq(priv->bus->irq, trans(priv));
iwl_free_isr_ict(trans(priv));
kfree(trans(priv));
trans(priv) = NULL;
}
......@@ -1191,7 +1195,7 @@ static int iwl_trans_pcie_resume(struct iwl_trans *trans)
{
bool hw_rfkill = false;
iwl_enable_interrupts(priv(trans));
iwl_enable_interrupts(trans);
if (!(iwl_read32(priv(trans), CSR_GP_CNTRL) &
CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
......@@ -1500,7 +1504,7 @@ const struct iwl_trans_ops trans_ops_pcie = {
.kick_nic = iwl_trans_pcie_kick_nic,
.sync_irq = iwl_trans_pcie_sync_irq,
.disable_sync_irq = iwl_trans_pcie_disable_sync_irq,
.free = iwl_trans_pcie_free,
.dbgfs_register = iwl_trans_pcie_dbgfs_register,
......
......@@ -94,10 +94,9 @@ struct iwl_shared;
* ready and a successful ADDBA response has been received.
* @txq_agg_disable: de-configure a Tx queue to send AMPDUs
* @kick_nic: remove the RESET from the embedded CPU and let it run
* @sync_irq: the upper layer will typically disable interrupt and call this
* handler. After this handler returns, it is guaranteed that all
* the ISR / tasklet etc... have finished running and the transport
* layer shall not pass any Rx.
* @disable_sync_irq: Disable and sync: after this handler returns, it is
* guaranteed that all the ISR / tasklet etc... have finished running
* and the transport layer shall not pass any Rx.
* @free: release all the ressource for the transport layer itself such as
* irq, tasklet etc...
* @dbgfs_register: add the dbgfs files under this directory. Files will be
......@@ -132,7 +131,7 @@ struct iwl_trans_ops {
void (*kick_nic)(struct iwl_priv *priv);
void (*sync_irq)(struct iwl_priv *priv);
void (*disable_sync_irq)(struct iwl_trans *trans);
void (*free)(struct iwl_priv *priv);
int (*dbgfs_register)(struct iwl_trans *trans, struct dentry* dir);
......@@ -232,9 +231,9 @@ static inline void iwl_trans_kick_nic(struct iwl_trans *trans)
trans->ops->kick_nic(priv(trans));
}
static inline void iwl_trans_sync_irq(struct iwl_trans *trans)
static inline void iwl_trans_disable_sync_irq(struct iwl_trans *trans)
{
trans->ops->sync_irq(priv(trans));
trans->ops->disable_sync_irq(trans);
}
static inline void iwl_trans_free(struct iwl_trans *trans)
......
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