Commit 0a053e8c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (42 commits)
  atmel-mci: fix sdc_reg typo
  tmio_mmc: add maintainer
  mmc: Add OpenFirmware bindings for SDHCI driver
  sdhci: Add quirk for forcing maximum block size to 2048 bytes
  sdhci: Add quirk for controllers that need IRQ re-init after reset
  sdhci: Add quirk for controllers that need small delays for PIO
  sdhci: Add set_clock callback and a quirk for nonstandard clocks
  sdhci: Add get_{max,timeout}_clock callbacks
  sdhci: Add support for hosts reporting inverted write-protect state
  sdhci: Add support for card-detection polling
  sdhci: Enable only relevant (DMA/PIO) interrupts during transfers
  sdhci: Split card-detection IRQs management from sdhci_init()
  sdhci: Add support for bus-specific IO memory accessors
  mmc_spi: adjust for delayed data token response
  omap_hsmmc: Wait for SDBP
  omap_hsmmc: Fix MMC3 dma
  omap_hsmmc: Disable SDBP at suspend
  omap_hsmmc: Do not prefix slot name
  omap_hsmmc: Allow cover switch to cause rescan
  omap_hsmmc: Add 8-bit bus width mode support
  ...
parents 601cc11d 32ab83a5
......@@ -2924,6 +2924,12 @@ M: buytenh@marvell.com
L: netdev@vger.kernel.org
S: Supported
MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER
P: Nicolas Pitre
M: nico@cam.org
L: linux-kernel@vger.kernel.org
S: Maintained
MARVELL YUKON / SYSKONNECT DRIVER
P: Mirko Lindner
M: mlindner@syskonnect.de
......@@ -3916,7 +3922,14 @@ S: Maintained
SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER
P: Pierre Ossman
M: drzeus-sdhci@drzeus.cx
L: sdhci-devel@list.drzeus.cx
L: sdhci-devel@lists.ossman.eu
S: Maintained
SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF)
P: Anton Vorontsov
M: avorontsov@ru.mvista.com
L: linuxppc-dev@ozlabs.org
L: sdhci-devel@lists.ossman.eu
S: Maintained
SECURITY SUBSYSTEM
......@@ -4394,6 +4407,11 @@ L: tlinux-users@tce.toshiba-dme.co.jp
W: http://www.buzzard.org.uk/toshiba/
S: Maintained
TMIO MMC DRIVER
P: Ian Molton
M: ian@mnementh.co.uk
S: Maintained
TPM DEVICE DRIVER
P: Debora Velarde
M: debora@linux.vnet.ibm.com
......
......@@ -41,6 +41,8 @@
#include "queue.h"
MODULE_ALIAS("mmc:block");
/*
* max 8 partitions per card
*/
......
......@@ -84,6 +84,14 @@ mmc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
}
retval = add_uevent_var(env, "MMC_NAME=%s", mmc_card_name(card));
if (retval)
return retval;
/*
* Request the mmc_block device. Note: that this is a direct request
* for the module it carries no information as to what is inserted.
*/
retval = add_uevent_var(env, "MODALIAS=mmc:block");
return retval;
}
......
......@@ -298,6 +298,21 @@ void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card)
data->timeout_clks = 0;
}
}
/*
* Some cards need very high timeouts if driven in SPI mode.
* The worst observed timeout was 900ms after writing a
* continuous stream of data until the internal logic
* overflowed.
*/
if (mmc_host_is_spi(card->host)) {
if (data->flags & MMC_DATA_WRITE) {
if (data->timeout_ns < 1000000000)
data->timeout_ns = 1000000000; /* 1s */
} else {
if (data->timeout_ns < 100000000)
data->timeout_ns = 100000000; /* 100ms */
}
}
}
EXPORT_SYMBOL(mmc_set_data_timeout);
......@@ -915,6 +930,7 @@ void mmc_stop_host(struct mmc_host *host)
spin_unlock_irqrestore(&host->lock, flags);
#endif
cancel_delayed_work(&host->detect);
mmc_flush_scheduled_work();
mmc_bus_get(host);
......@@ -942,6 +958,7 @@ void mmc_stop_host(struct mmc_host *host)
*/
int mmc_suspend_host(struct mmc_host *host, pm_message_t state)
{
cancel_delayed_work(&host->detect);
mmc_flush_scheduled_work();
mmc_bus_get(host);
......@@ -975,6 +992,7 @@ int mmc_resume_host(struct mmc_host *host)
mmc_bus_get(host);
if (host->bus_ops && !host->bus_dead) {
mmc_power_up(host);
mmc_select_voltage(host, host->ocr);
BUG_ON(!host->bus_ops->resume);
host->bus_ops->resume(host);
}
......
......@@ -184,6 +184,68 @@ static int mmc_dbg_card_status_get(void *data, u64 *val)
DEFINE_SIMPLE_ATTRIBUTE(mmc_dbg_card_status_fops, mmc_dbg_card_status_get,
NULL, "%08llx\n");
#define EXT_CSD_STR_LEN 1025
static int mmc_ext_csd_open(struct inode *inode, struct file *filp)
{
struct mmc_card *card = inode->i_private;
char *buf;
ssize_t n = 0;
u8 *ext_csd;
int err, i;
buf = kmalloc(EXT_CSD_STR_LEN + 1, GFP_KERNEL);
if (!buf)
return -ENOMEM;
ext_csd = kmalloc(512, GFP_KERNEL);
if (!ext_csd) {
err = -ENOMEM;
goto out_free;
}
mmc_claim_host(card->host);
err = mmc_send_ext_csd(card, ext_csd);
mmc_release_host(card->host);
if (err)
goto out_free;
for (i = 511; i >= 0; i--)
n += sprintf(buf + n, "%02x", ext_csd[i]);
n += sprintf(buf + n, "\n");
BUG_ON(n != EXT_CSD_STR_LEN);
filp->private_data = buf;
kfree(ext_csd);
return 0;
out_free:
kfree(buf);
kfree(ext_csd);
return err;
}
static ssize_t mmc_ext_csd_read(struct file *filp, char __user *ubuf,
size_t cnt, loff_t *ppos)
{
char *buf = filp->private_data;
return simple_read_from_buffer(ubuf, cnt, ppos,
buf, EXT_CSD_STR_LEN);
}
static int mmc_ext_csd_release(struct inode *inode, struct file *file)
{
kfree(file->private_data);
return 0;
}
static struct file_operations mmc_dbg_ext_csd_fops = {
.open = mmc_ext_csd_open,
.read = mmc_ext_csd_read,
.release = mmc_ext_csd_release,
};
void mmc_add_card_debugfs(struct mmc_card *card)
{
struct mmc_host *host = card->host;
......@@ -211,6 +273,11 @@ void mmc_add_card_debugfs(struct mmc_card *card)
&mmc_dbg_card_status_fops))
goto err;
if (mmc_card_mmc(card))
if (!debugfs_create_file("ext_csd", S_IRUSR, root, card,
&mmc_dbg_ext_csd_fops))
goto err;
return;
err:
......
......@@ -223,10 +223,18 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
if (tpl_code == 0xff)
break;
/* null entries have no link field or data */
if (tpl_code == 0x00)
continue;
ret = mmc_io_rw_direct(card, 0, 0, ptr++, 0, &tpl_link);
if (ret)
break;
/* a size of 0xff also means we're done */
if (tpl_link == 0xff)
break;
this = kmalloc(sizeof(*this) + tpl_link, GFP_KERNEL);
if (!this)
return -ENOMEM;
......
......@@ -76,6 +76,10 @@ int mmc_io_rw_direct(struct mmc_card *card, int write, unsigned fn,
BUG_ON(!card);
BUG_ON(fn > 7);
/* sanity check */
if (addr & ~0x1FFFF)
return -EINVAL;
memset(&cmd, 0, sizeof(struct mmc_command));
cmd.opcode = SD_IO_RW_DIRECT;
......@@ -125,6 +129,10 @@ int mmc_io_rw_extended(struct mmc_card *card, int write, unsigned fn,
WARN_ON(blocks == 0);
WARN_ON(blksz == 0);
/* sanity check */
if (addr & ~0x1FFFF)
return -EINVAL;
memset(&mrq, 0, sizeof(struct mmc_request));
memset(&cmd, 0, sizeof(struct mmc_command));
memset(&data, 0, sizeof(struct mmc_data));
......
......@@ -37,6 +37,13 @@ config MMC_SDHCI
If unsure, say N.
config MMC_SDHCI_IO_ACCESSORS
bool
depends on MMC_SDHCI
help
This is silent Kconfig symbol that is selected by the drivers that
need to overwrite SDHCI IO memory accessors.
config MMC_SDHCI_PCI
tristate "SDHCI support on PCI bus"
depends on MMC_SDHCI && PCI
......@@ -65,6 +72,17 @@ config MMC_RICOH_MMC
If unsure, say Y.
config MMC_SDHCI_OF
tristate "SDHCI support on OpenFirmware platforms"
depends on MMC_SDHCI && PPC_OF
select MMC_SDHCI_IO_ACCESSORS
help
This selects the OF support for Secure Digital Host Controller
Interfaces. So far, only the Freescale eSDHC controller is known
to exist on OF platforms.
If unsure, say N.
config MMC_OMAP
tristate "TI OMAP Multimedia Card Interface support"
depends on ARCH_OMAP
......@@ -171,6 +189,17 @@ config MMC_TIFM_SD
To compile this driver as a module, choose M here: the
module will be called tifm_sd.
config MMC_MVSDIO
tristate "Marvell MMC/SD/SDIO host driver"
depends on PLAT_ORION
---help---
This selects the Marvell SDIO host driver.
SDIO may currently be found on the Kirkwood 88F6281 and 88F6192
SoC controllers.
To compile this driver as a module, choose M here: the
module will be called mvsdio.
config MMC_SPI
tristate "MMC/SD/SDIO over SPI"
depends on SPI_MASTER && !HIGHMEM && HAS_DMA
......
......@@ -13,6 +13,7 @@ obj-$(CONFIG_MMC_MXC) += mxcmmc.o
obj-$(CONFIG_MMC_SDHCI) += sdhci.o
obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o
obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
obj-$(CONFIG_MMC_WBSD) += wbsd.o
obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
obj-$(CONFIG_MMC_OMAP) += omap.o
......@@ -20,6 +21,7 @@ obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
obj-$(CONFIG_MMC_AT91) += at91_mci.o
obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
obj-$(CONFIG_MMC_MVSDIO) += mvsdio.o
obj-$(CONFIG_MMC_SPI) += mmc_spi.o
ifeq ($(CONFIG_OF),y)
obj-$(CONFIG_MMC_SPI) += of_mmc_spi.o
......
......@@ -812,7 +812,7 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
slot->sdc_reg |= MCI_SDCBUS_1BIT;
break;
case MMC_BUS_WIDTH_4:
slot->sdc_reg = MCI_SDCBUS_4BIT;
slot->sdc_reg |= MCI_SDCBUS_4BIT;
break;
}
......
......@@ -279,8 +279,11 @@ static int mmc_spi_response_get(struct mmc_spi_host *host,
* so it can always DMA directly into the target buffer.
* It'd probably be better to memcpy() the first chunk and
* avoid extra i/o calls...
*
* Note we check for more than 8 bytes, because in practice,
* some SD cards are slow...
*/
for (i = 2; i < 9; i++) {
for (i = 2; i < 16; i++) {
value = mmc_spi_readbytes(host, 1);
if (value < 0)
goto done;
......@@ -609,6 +612,7 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t,
struct spi_device *spi = host->spi;
int status, i;
struct scratch *scratch = host->data;
u32 pattern;
if (host->mmc->use_spi_crc)
scratch->crc_val = cpu_to_be16(
......@@ -636,8 +640,27 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t,
* doesn't necessarily tell whether the write operation succeeded;
* it just says if the transmission was ok and whether *earlier*
* writes succeeded; see the standard.
*
* In practice, there are (even modern SDHC-)cards which are late
* in sending the response, and miss the time frame by a few bits,
* so we have to cope with this situation and check the response
* bit-by-bit. Arggh!!!
*/
switch (SPI_MMC_RESPONSE_CODE(scratch->status[0])) {
pattern = scratch->status[0] << 24;
pattern |= scratch->status[1] << 16;
pattern |= scratch->status[2] << 8;
pattern |= scratch->status[3];
/* First 3 bit of pattern are undefined */
pattern |= 0xE0000000;
/* left-adjust to leading 0 bit */
while (pattern & 0x80000000)
pattern <<= 1;
/* right-adjust for pattern matching. Code is in bit 4..0 now. */
pattern >>= 27;
switch (pattern) {
case SPI_RESPONSE_ACCEPTED:
status = 0;
break;
......@@ -668,8 +691,9 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t,
/* Return when not busy. If we didn't collect that status yet,
* we'll need some more I/O.
*/
for (i = 1; i < sizeof(scratch->status); i++) {
if (scratch->status[i] != 0)
for (i = 4; i < sizeof(scratch->status); i++) {
/* card is non-busy if the most recent bit is 1 */
if (scratch->status[i] & 0x01)
return 0;
}
return mmc_spi_wait_unbusy(host, timeout);
......@@ -1204,10 +1228,12 @@ static int mmc_spi_probe(struct spi_device *spi)
/* MMC and SD specs only seem to care that sampling is on the
* rising edge ... meaning SPI modes 0 or 3. So either SPI mode
* should be legit. We'll use mode 0 since it seems to be a
* bit less troublesome on some hardware ... unclear why.
* should be legit. We'll use mode 0 since the steady state is 0,
* which is appropriate for hotplugging, unless the platform data
* specify mode 3 (if hardware is not compatible to mode 0).
*/
spi->mode = SPI_MODE_0;
if (spi->mode != SPI_MODE_3)
spi->mode = SPI_MODE_0;
spi->bits_per_word = 8;
status = spi_setup(spi);
......
This diff is collapsed.
/*
* Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MVSDIO_H
#define __MVSDIO_H
/*
* Clock rates
*/
#define MVSD_CLOCKRATE_MAX 50000000
#define MVSD_BASE_DIV_MAX 0x7ff
/*
* Register offsets
*/
#define MVSD_SYS_ADDR_LOW 0x000
#define MVSD_SYS_ADDR_HI 0x004
#define MVSD_BLK_SIZE 0x008
#define MVSD_BLK_COUNT 0x00c
#define MVSD_ARG_LOW 0x010
#define MVSD_ARG_HI 0x014
#define MVSD_XFER_MODE 0x018
#define MVSD_CMD 0x01c
#define MVSD_RSP(i) (0x020 + ((i)<<2))
#define MVSD_RSP0 0x020
#define MVSD_RSP1 0x024
#define MVSD_RSP2 0x028
#define MVSD_RSP3 0x02c
#define MVSD_RSP4 0x030
#define MVSD_RSP5 0x034
#define MVSD_RSP6 0x038
#define MVSD_RSP7 0x03c
#define MVSD_FIFO 0x040
#define MVSD_RSP_CRC7 0x044
#define MVSD_HW_STATE 0x048
#define MVSD_HOST_CTRL 0x050
#define MVSD_BLK_GAP_CTRL 0x054
#define MVSD_CLK_CTRL 0x058
#define MVSD_SW_RESET 0x05c
#define MVSD_NOR_INTR_STATUS 0x060
#define MVSD_ERR_INTR_STATUS 0x064
#define MVSD_NOR_STATUS_EN 0x068
#define MVSD_ERR_STATUS_EN 0x06c
#define MVSD_NOR_INTR_EN 0x070
#define MVSD_ERR_INTR_EN 0x074
#define MVSD_AUTOCMD12_ERR_STATUS 0x078
#define MVSD_CURR_BYTE_LEFT 0x07c
#define MVSD_CURR_BLK_LEFT 0x080
#define MVSD_AUTOCMD12_ARG_LOW 0x084
#define MVSD_AUTOCMD12_ARG_HI 0x088
#define MVSD_AUTOCMD12_CMD 0x08c
#define MVSD_AUTO_RSP(i) (0x090 + ((i)<<2))
#define MVSD_AUTO_RSP0 0x090
#define MVSD_AUTO_RSP1 0x094
#define MVSD_AUTO_RSP2 0x098
#define MVSD_CLK_DIV 0x128
#define MVSD_WINDOW_CTRL(i) (0x108 + ((i) << 3))
#define MVSD_WINDOW_BASE(i) (0x10c + ((i) << 3))
/*
* MVSD_CMD
*/
#define MVSD_CMD_RSP_NONE (0 << 0)
#define MVSD_CMD_RSP_136 (1 << 0)
#define MVSD_CMD_RSP_48 (2 << 0)
#define MVSD_CMD_RSP_48BUSY (3 << 0)
#define MVSD_CMD_CHECK_DATACRC16 (1 << 2)
#define MVSD_CMD_CHECK_CMDCRC (1 << 3)
#define MVSD_CMD_INDX_CHECK (1 << 4)
#define MVSD_CMD_DATA_PRESENT (1 << 5)
#define MVSD_UNEXPECTED_RESP (1 << 7)
#define MVSD_CMD_INDEX(x) ((x) << 8)
/*
* MVSD_AUTOCMD12_CMD
*/
#define MVSD_AUTOCMD12_BUSY (1 << 0)
#define MVSD_AUTOCMD12_INDX_CHECK (1 << 1)
#define MVSD_AUTOCMD12_INDEX(x) ((x) << 8)
/*
* MVSD_XFER_MODE
*/
#define MVSD_XFER_MODE_WR_DATA_START (1 << 0)
#define MVSD_XFER_MODE_HW_WR_DATA_EN (1 << 1)
#define MVSD_XFER_MODE_AUTO_CMD12 (1 << 2)
#define MVSD_XFER_MODE_INT_CHK_EN (1 << 3)
#define MVSD_XFER_MODE_TO_HOST (1 << 4)
#define MVSD_XFER_MODE_STOP_CLK (1 << 5)
#define MVSD_XFER_MODE_PIO (1 << 6)
/*
* MVSD_HOST_CTRL
*/
#define MVSD_HOST_CTRL_PUSH_PULL_EN (1 << 0)
#define MVSD_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1)
#define MVSD_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1)
#define MVSD_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1)
#define MVSD_HOST_CTRL_CARD_TYPE_IO_MMC (3 << 1)
#define MVSD_HOST_CTRL_CARD_TYPE_MASK (3 << 1)
#define MVSD_HOST_CTRL_BIG_ENDIAN (1 << 3)
#define MVSD_HOST_CTRL_LSB_FIRST (1 << 4)
#define MVSD_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9)
#define MVSD_HOST_CTRL_HI_SPEED_EN (1 << 10)
#define MVSD_HOST_CTRL_TMOUT_MAX 0xf
#define MVSD_HOST_CTRL_TMOUT_MASK (0xf << 11)
#define MVSD_HOST_CTRL_TMOUT(x) ((x) << 11)
#define MVSD_HOST_CTRL_TMOUT_EN (1 << 15)
/*
* MVSD_SW_RESET
*/
#define MVSD_SW_RESET_NOW (1 << 8)
/*
* Normal interrupt status bits
*/
#define MVSD_NOR_CMD_DONE (1 << 0)
#define MVSD_NOR_XFER_DONE (1 << 1)
#define MVSD_NOR_BLK_GAP_EVT (1 << 2)
#define MVSD_NOR_DMA_DONE (1 << 3)
#define MVSD_NOR_TX_AVAIL (1 << 4)
#define MVSD_NOR_RX_READY (1 << 5)
#define MVSD_NOR_CARD_INT (1 << 8)
#define MVSD_NOR_READ_WAIT_ON (1 << 9)
#define MVSD_NOR_RX_FIFO_8W (1 << 10)
#define MVSD_NOR_TX_FIFO_8W (1 << 11)
#define MVSD_NOR_SUSPEND_ON (1 << 12)
#define MVSD_NOR_AUTOCMD12_DONE (1 << 13)
#define MVSD_NOR_UNEXP_RSP (1 << 14)
#define MVSD_NOR_ERROR (1 << 15)
/*
* Error status bits
*/
#define MVSD_ERR_CMD_TIMEOUT (1 << 0)
#define MVSD_ERR_CMD_CRC (1 << 1)
#define MVSD_ERR_CMD_ENDBIT (1 << 2)
#define MVSD_ERR_CMD_INDEX (1 << 3)
#define MVSD_ERR_DATA_TIMEOUT (1 << 4)
#define MVSD_ERR_DATA_CRC (1 << 5)
#define MVSD_ERR_DATA_ENDBIT (1 << 6)
#define MVSD_ERR_AUTOCMD12 (1 << 8)
#define MVSD_ERR_CMD_STARTBIT (1 << 9)
#define MVSD_ERR_XFER_SIZE (1 << 10)
#define MVSD_ERR_RESP_T_BIT (1 << 11)
#define MVSD_ERR_CRC_ENDBIT (1 << 12)
#define MVSD_ERR_CRC_STARTBIT (1 << 13)
#define MVSD_ERR_CRC_STATUS (1 << 14)
/*
* CMD12 error status bits
*/
#define MVSD_AUTOCMD12_ERR_NOTEXE (1 << 0)
#define MVSD_AUTOCMD12_ERR_TIMEOUT (1 << 1)
#define MVSD_AUTOCMD12_ERR_CRC (1 << 2)
#define MVSD_AUTOCMD12_ERR_ENDBIT (1 << 3)
#define MVSD_AUTOCMD12_ERR_INDEX (1 << 4)
#define MVSD_AUTOCMD12_ERR_RESP_T_BIT (1 << 5)
#define MVSD_AUTOCMD12_ERR_RESP_STARTBIT (1 << 6)
#endif
......@@ -56,6 +56,7 @@
#define SDVS18 (0x5 << 9)
#define SDVS30 (0x6 << 9)
#define SDVS33 (0x7 << 9)
#define SDVS_MASK 0x00000E00
#define SDVSCLR 0xFFFFF1FF
#define SDVSDET 0x00000400
#define AUTOIDLE 0x1
......@@ -76,6 +77,7 @@
#define MSBS (1 << 5)
#define BCE (1 << 1)
#define FOUR_BIT (1 << 1)
#define DW8 (1 << 5)
#define CC 0x1
#define TC 0x02
#define OD 0x1
......@@ -98,10 +100,8 @@
*/
#define OMAP_MMC1_DEVID 0
#define OMAP_MMC2_DEVID 1
#define OMAP_MMC3_DEVID 2
#define OMAP_MMC_DATADIR_NONE 0
#define OMAP_MMC_DATADIR_READ 1
#define OMAP_MMC_DATADIR_WRITE 2
#define MMC_TIMEOUT_MS 20
#define OMAP_MMC_MASTER_CLOCK 96000000
#define DRIVER_NAME "mmci-omap-hs"
......@@ -137,18 +137,18 @@ struct mmc_omap_host {
resource_size_t mapbase;
unsigned int id;
unsigned int dma_len;
unsigned int dma_dir;
unsigned int dma_sg_idx;
unsigned char bus_mode;
unsigned char datadir;
u32 *buffer;
u32 bytesleft;
int suspended;
int irq;
int carddetect;
int use_dma, dma_ch;
int initstr;
int dma_line_tx, dma_line_rx;
int slot_id;
int dbclk_enabled;
int response_busy;
struct omap_mmc_platform_data *pdata;
};
......@@ -218,7 +218,7 @@ mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr,
struct mmc_omap_host *host = mmc_priv(mmc);
struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id];
return sprintf(buf, "slot:%s\n", slot.name);
return sprintf(buf, "%s\n", slot.name);
}
static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL);
......@@ -243,10 +243,14 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK