Commit 08b15d13 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "A couple of small fixes, and wiring up the new syscalls which appeared
  during the merge window"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8550/1: protect idiv patching against undefined gcc behavior
  ARM: wire up preadv2 and pwritev2 syscalls
  ARM: SMP enable of cache maintanence broadcast
parents 2f422f94 208fae5c
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
* This may need to be greater than __NR_last_syscall+1 in order to * This may need to be greater than __NR_last_syscall+1 in order to
* account for the padding in the syscall table * account for the padding in the syscall table
*/ */
#define __NR_syscalls (392) #define __NR_syscalls (396)
#define __ARCH_WANT_STAT64 #define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_GETHOSTNAME #define __ARCH_WANT_SYS_GETHOSTNAME
......
...@@ -418,6 +418,8 @@ ...@@ -418,6 +418,8 @@
#define __NR_membarrier (__NR_SYSCALL_BASE+389) #define __NR_membarrier (__NR_SYSCALL_BASE+389)
#define __NR_mlock2 (__NR_SYSCALL_BASE+390) #define __NR_mlock2 (__NR_SYSCALL_BASE+390)
#define __NR_copy_file_range (__NR_SYSCALL_BASE+391) #define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
#define __NR_preadv2 (__NR_SYSCALL_BASE+392)
#define __NR_pwritev2 (__NR_SYSCALL_BASE+393)
/* /*
* The following SWIs are ARM private. * The following SWIs are ARM private.
......
...@@ -399,8 +399,10 @@ ...@@ -399,8 +399,10 @@
CALL(sys_execveat) CALL(sys_execveat)
CALL(sys_userfaultfd) CALL(sys_userfaultfd)
CALL(sys_membarrier) CALL(sys_membarrier)
CALL(sys_mlock2) /* 390 */ CALL(sys_mlock2)
CALL(sys_copy_file_range) CALL(sys_copy_file_range)
CALL(sys_preadv2)
CALL(sys_pwritev2)
#ifndef syscalls_counted #ifndef syscalls_counted
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
#define syscalls_counted #define syscalls_counted
......
...@@ -430,11 +430,13 @@ static void __init patch_aeabi_idiv(void) ...@@ -430,11 +430,13 @@ static void __init patch_aeabi_idiv(void)
pr_info("CPU: div instructions available: patching division code\n"); pr_info("CPU: div instructions available: patching division code\n");
fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1; fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1;
asm ("" : "+g" (fn_addr));
((u32 *)fn_addr)[0] = udiv_instruction(); ((u32 *)fn_addr)[0] = udiv_instruction();
((u32 *)fn_addr)[1] = bx_lr_instruction(); ((u32 *)fn_addr)[1] = bx_lr_instruction();
flush_icache_range(fn_addr, fn_addr + 8); flush_icache_range(fn_addr, fn_addr + 8);
fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1; fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1;
asm ("" : "+g" (fn_addr));
((u32 *)fn_addr)[0] = sdiv_instruction(); ((u32 *)fn_addr)[0] = sdiv_instruction();
((u32 *)fn_addr)[1] = bx_lr_instruction(); ((u32 *)fn_addr)[1] = bx_lr_instruction();
flush_icache_range(fn_addr, fn_addr + 8); flush_icache_range(fn_addr, fn_addr + 8);
......
...@@ -281,12 +281,12 @@ __v7_ca17mp_setup: ...@@ -281,12 +281,12 @@ __v7_ca17mp_setup:
bl v7_invalidate_l1 bl v7_invalidate_l1
ldmia r12, {r1-r6, lr} ldmia r12, {r1-r6, lr}
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode
ALT_SMP(mrc p15, 0, r0, c1, c0, 1) ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
ALT_UP(mov r0, #(1 << 6)) @ fake it for UP ALT_UP(mov r0, r10) @ fake it for UP
tst r0, #(1 << 6) @ SMP/nAMP mode enabled? orr r10, r10, r0 @ Set required bits
orreq r0, r0, #(1 << 6) @ Enable SMP/nAMP mode teq r10, r0 @ Were they already set?
orreq r0, r0, r10 @ Enable CPU-specific SMP bits mcrne p15, 0, r10, c1, c0, 1 @ No, update register
mcreq p15, 0, r0, c1, c0, 1
#endif #endif
b __v7_setup_cont b __v7_setup_cont
......
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