Commit 07f841b7 authored by Russell King's avatar Russell King Committed by Russell King

[ARM] mm: enable sparsemem on clps7500 and RiscPC

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent b7a69ac3
...@@ -250,6 +250,7 @@ config ARCH_CLPS7500 ...@@ -250,6 +250,7 @@ config ARCH_CLPS7500
select TIMER_ACORN select TIMER_ACORN
select ISA select ISA
select NO_IOPORT select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
help help
Support for the Cirrus Logic PS7500FE system-on-a-chip. Support for the Cirrus Logic PS7500FE system-on-a-chip.
...@@ -470,6 +471,7 @@ config ARCH_RPC ...@@ -470,6 +471,7 @@ config ARCH_RPC
select HAVE_PATA_PLATFORM select HAVE_PATA_PLATFORM
select ISA_DMA_API select ISA_DMA_API
select NO_IOPORT select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
help help
On the Acorn Risc-PC, Linux can support the internal IDE disk and On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive. CD-ROM interface, serial and parallel port, and the floppy drive.
......
...@@ -3,8 +3,22 @@ ...@@ -3,8 +3,22 @@
#include <asm/memory.h> #include <asm/memory.h>
#define MAX_PHYSADDR_BITS 32 /*
#define MAX_PHYSMEM_BITS 32 * Two definitions are required for sparsemem:
#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS *
* MAX_PHYSMEM_BITS: The number of physical address bits required
* to address the last byte of memory.
*
* SECTION_SIZE_BITS: The number of physical address bits to cover
* the maximum amount of memory in a section.
*
* Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
* then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
*
* Define these in your mach/memory.h.
*/
#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS)
#error Sparsemem is not supported on this platform
#endif
#endif #endif
...@@ -32,4 +32,12 @@ ...@@ -32,4 +32,12 @@
#define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000 #define FLUSH_BASE 0xdf000000
/*
* Sparsemem support. Each section is a maximum of 64MB. The sections
* are offset by 128MB and can cover 128MB, so that gives us a maximum
* of 29 physmem bits.
*/
#define MAX_PHYSMEM_BITS 29
#define SECTION_SIZE_BITS 26
#endif #endif
...@@ -36,4 +36,12 @@ ...@@ -36,4 +36,12 @@
#define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000 #define FLUSH_BASE 0xdf000000
/*
* Sparsemem support. Each section is a maximum of 64MB. The sections
* are offset by 128MB and can cover 128MB, so that gives us a maximum
* of 29 physmem bits.
*/
#define MAX_PHYSMEM_BITS 29
#define SECTION_SIZE_BITS 26
#endif #endif
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