• Bruce Allan's avatar
    e1000e: workaround DMA unit hang on I218 · e08f626b
    Bruce Allan authored
    
    
    At 1000Mbps link speed, one of the MAC's internal clocks can be stopped for
    up to 4us when entering K1 (a power mode of the MAC-PHY interconnect).  If
    the MAC is waiting for completion indications for 2 DMA write requests into
    Host memory (e.g. descriptor writeback or Rx packet writing) and the
    indications occur while the clock is stopped, both indications will be
    missed by the MAC causing the MAC to wait for the completion indications
    and be unable to generate further DMA write requests.  This results in an
    apparent hardware hang.
    
    Work-around the issue by disabling the de-assertion of the clock request
    when 1000Mbps link is acquired (K1 must be disabled while doing this).
    Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
    Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
    Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
    e08f626b
ich8lan.h 10.6 KB