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    ARM: 6466/1: implement flush_icache_all for the rest of the CPUs · c8c90860
    Mika Westerberg authored
    Commit 81d11955
    
     ("ARM: 6405/1: Handle __flush_icache_all for
    CONFIG_SMP_ON_UP") added a new function to struct cpu_cache_fns:
    flush_icache_all(). It also implemented this for v6 and v7 but not
    for v5 and backwards. Without the function pointer in place, we
    will be calling wrong cache functions.
    
    For example with ep93xx we get following:
    
        Unable to handle kernel paging request at virtual address ee070f38
        pgd = c0004000
        [ee070f38] *pgd=00000000
        Internal error: Oops: 80000005 [#1] PREEMPT
        last sysfs file:
        Modules linked in:
        CPU: 0    Not tainted  (2.6.36+ #1)
        PC is at 0xee070f38
        LR is at __dma_alloc+0x11c/0x2d0
        pc : [<ee070f38>]    lr : [<c0032c8c>]    psr: 60000013
        sp : c581bde0  ip : 00000000  fp : c0472000
        r10: c0472000  r9 : 000000d0  r8 : 00020000
        r7 : 0001ffff  r6 : 00000000  r5 : c0472400  r4 : c5980000
        r3 : c03ab7e0  r2 : 00000000  r1 : c59a0000  r0 : c5980000
        Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
        Control: c000717f  Table: c0004000  DAC: 00000017
        Process swapper (pid: 1, stack limit = 0xc581a270)
        [<c0032c8c>] (__dma_alloc+0x11c/0x2d0)
        [<c0032e5c>] (dma_alloc_writecombine+0x1c/0x24)
        [<c0204148>] (ep93xx_pcm_preallocate_dma_buffer+0x44/0x60)
        [<c02041c0>] (ep93xx_pcm_new+0x5c/0x88)
        [<c01ff188>] (snd_soc_instantiate_cards+0x8a8/0xbc0)
        [<c01ff59c>] (soc_probe+0xfc/0x134)
        [<c01adafc>] (platform_drv_probe+0x18/0x1c)
        [<c01acca4>] (driver_probe_device+0xb0/0x16c)
        [<c01ac284>] (bus_for_each_drv+0x48/0x84)
        [<c01ace90>] (device_attach+0x50/0x68)
        [<c01ac0f8>] (bus_probe_device+0x24/0x44)
        [<c01aad7c>] (device_add+0x2fc/0x44c)
        [<c01adfa8>] (platform_device_add+0x104/0x15c)
        [<c0015eb8>] (simone_init+0x60/0x94)
        [<c0021410>] (do_one_initcall+0xd0/0x1a4)
    
    __dma_alloc() calls (inlined) __dma_alloc_buffer() which ends up
    calling dmac_flush_range(). Now since the entries in the
    arm920_cache_fns are shifted by one, we jump into address 0xee070f38
    which is actually next instruction after the arm920_cache_fns
    structure.
    
    So implement flush_icache_all() for the rest of the supported CPUs
    using a generic 'invalidate I cache' instruction.
    
    Signed-off-by: default avatarMika Westerberg <mika.westerberg@iki.fi>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    c8c90860