• Lorenzo Pieralisi's avatar
    arm64: kernel: enforce pmuserenr_el0 initialization and restore · 60792ad3
    Lorenzo Pieralisi authored
    
    
    The pmuserenr_el0 register value is architecturally UNKNOWN on reset.
    Current kernel code resets that register value iff the core pmu device is
    correctly probed in the kernel. On platforms with missing DT pmu nodes (or
    disabled perf events in the kernel), the pmu is not probed, therefore the
    pmuserenr_el0 register is not reset in the kernel, which means that its
    value retains the reset value that is architecturally UNKNOWN (system
    may run with eg pmuserenr_el0 == 0x1, which means that PMU counters access
    is available at EL0, which must be disallowed).
    
    This patch adds code that resets pmuserenr_el0 on cold boot and restores
    it on core resume from shutdown, so that the pmuserenr_el0 setup is
    always enforced in the kernel.
    
    Cc: <stable@vger.kernel.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    60792ad3
perf_event.c 26.8 KB