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    ARM: OMAP4: CPUidle: add synchronization for coupled idle states · 5b4d5bcc
    Kevin Hilman authored
    
    
    With coupled idle states, a failure for any CPU to hit a low power
    state must be coordinated such that all CPUs abort.
    
    On OMAP4, when entering a coupled state, CPU0 has to wait for CPU1 to
    enter its low power state before it can enter its low power state.
    
    This is implemented by letting CPU0 wait for the CPU1 powerdomain to
    hit off.  However, there are conditions where CPU1 might abort/fail
    and not hit off while CPU0 is waiting for it.  For example, a CPU1
    wakeup or a failed attempt to hit off due to hardware conditions.
    
    To avoid the deadlock where CPU0 would continually wait for CPU1 to
    hit off-mode, this patch adds a flag to signal when each CPU has come
    out of its low-power state.  CPU0 then checks whether CPU1 has hit off
    *or* has already completed its attempt to hit off.  If the latter,
    CPU0 must abort its attempt to hit a low-power state so the coupled
    state enter method can return.
    
    In addition, cpuidle_coupled_parallel_barrier() is used to ensure the
    clearing of the 'done' flag is synchronized on all CPUs.
    
    Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
    Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
    5b4d5bcc