• Mark Rutland's avatar
    arm64: ensure completion of TLB invalidatation · 3cea71bc
    Mark Rutland authored
    
    
    Currently there is no dsb between the tlbi in __cpu_setup and the write
    to SCTLR_EL1 which enables the MMU in __turn_mmu_on. This means that the
    TLB invalidation is not guaranteed to have completed at the point
    address translation is enabled, leading to a number of possible issues
    including incorrect translations and TLB conflict faults.
    
    This patch moves the tlbi in __cpu_setup above an existing dsb used to
    synchronise I-cache invalidation, ensuring that the TLBs have been
    invalidated at the point the MMU is enabled.
    Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
    Cc: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Will Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    3cea71bc
proc.S 4.1 KB