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    documentation: memory-barriers: clarify relaxed io accessor semantics · a8e0aead
    Will Deacon authored
    
    
    This patch extends the paragraph describing the relaxed read io accessors
    so that the relaxed accessors are defined to be:
    
     - Ordered with respect to each other if accessing the same peripheral
    
     - Unordered with respect to normal memory accesses
    
     - Unordered with respect to LOCK/UNLOCK operations
    
    Whilst many architectures will provide stricter semantics, ARM, Alpha and
    PPC can achieve significant performance gains by taking advantage of some
    or all of the above relaxations.
    
    Cc: Randy Dunlap <rdunlap@infradead.org>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
    Cc: David Howells <dhowells@redhat.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    a8e0aead