hpt366.c 43.5 KB
Newer Older
Linus Torvalds's avatar
Linus Torvalds committed
1
2
3
4
5
6
/*
 * linux/drivers/ide/pci/hpt366.c		Version 0.36	April 25, 2003
 *
 * Copyright (C) 1999-2003		Andre Hedrick <andre@linux-ide.org>
 * Portions Copyright (C) 2001	        Sun Microsystems, Inc.
 * Portions Copyright (C) 2003		Red Hat Inc
7
 * Portions Copyright (C) 2005-2006	MontaVista Software, Inc.
Linus Torvalds's avatar
Linus Torvalds committed
8
9
10
11
12
13
 *
 * Thanks to HighPoint Technologies for their assistance, and hardware.
 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
 * donation of an ABit BP6 mainboard, processor, and memory acellerated
 * development and support.
 *
14
 *
15
16
17
18
19
 * HighPoint has its own drivers (open source except for the RAID part)
 * available from http://www.highpoint-tech.com/BIOS%20+%20Driver/.
 * This may be useful to anyone wanting to work on this driver, however  do not
 * trust  them too much since the code tends to become less and less meaningful
 * as the time passes... :-/
20
 *
Linus Torvalds's avatar
Linus Torvalds committed
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
 * Note that final HPT370 support was done by force extraction of GPL.
 *
 * - add function for getting/setting power status of drive
 * - the HPT370's state machine can get confused. reset it before each dma 
 *   xfer to prevent that from happening.
 * - reset state engine whenever we get an error.
 * - check for busmaster state at end of dma. 
 * - use new highpoint timings.
 * - detect bus speed using highpoint register.
 * - use pll if we don't have a clock table. added a 66MHz table that's
 *   just 2x the 33MHz table.
 * - removed turnaround. NOTE: we never want to switch between pll and
 *   pci clocks as the chip can glitch in those cases. the highpoint
 *   approved workaround slows everything down too much to be useful. in
 *   addition, we would have to serialize access to each chip.
 * 	Adrian Sun <a.sun@sun.com>
 *
 * add drive timings for 66MHz PCI bus,
 * fix ATA Cable signal detection, fix incorrect /proc info
 * add /proc display for per-drive PIO/DMA/UDMA mode and
 * per-channel ATA-33/66 Cable detect.
 * 	Duncan Laurie <void@sun.com>
 *
 * fixup /proc output for multiple controllers
 *	Tim Hockin <thockin@sun.com>
 *
 * On hpt366: 
 * Reset the hpt366 on error, reset on dma
 * Fix disabling Fast Interrupt hpt366.
 * 	Mike Waychison <crlf@sun.com>
 *
 * Added support for 372N clocking and clock switching. The 372N needs
 * different clocks on read/write. This requires overloading rw_disk and
 * other deeply crazy things. Thanks to <http://www.hoerstreich.de> for
 * keeping me sane. 
 *		Alan Cox <alan@redhat.com>
 *
58
59
60
61
62
63
64
65
66
67
68
69
 * - fix the clock turnaround code: it was writing to the wrong ports when
 *   called for the secondary channel, caching the current clock mode per-
 *   channel caused the cached register value to get out of sync with the
 *   actual one, the channels weren't serialized, the turnaround shouldn't
 *   be done on 66 MHz PCI bus
 * - avoid calibrating PLL twice as the second time results in a wrong PCI
 *   frequency and thus in the wrong timings for the secondary channel
 * - disable UltraATA/133 for HPT372 by default (50 MHz DPLL clock do not
 *   allow for this speed anyway)
 * - add support for HPT302N and HPT371N clocking (the same as for HPT372N)
 * - HPT371/N are single channel chips, so avoid touching the primary channel
 *   which exists only virtually (there's no pins for it)
70
71
72
 * - fix/remove bad/unused timing tables and use one set of tables for the whole
 *   HPT37x chip family; save space by introducing the separate transfer mode
 *   table in which the mode lookup is done
73
74
 * - fix the hotswap code:  it caused RESET- to glitch when tristating the bus,
 *   and for HPT36x the obsolete HDIO_TRISTATE_HWIF handler was called instead
75
76
 * - pass to init_chipset() handlers a copy of the IDE PCI device structure as
 *   they tamper with its fields
77
78
 *		<source@mvista.com>
 *
Linus Torvalds's avatar
Linus Torvalds committed
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
 */


#include <linux/types.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>

#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/ide.h>

#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>

/* various tuning parameters */
#define HPT_RESET_STATE_ENGINE
103
104
#undef	HPT_DELAY_INTERRUPT
#define HPT_SERIALIZE_IO	0
Linus Torvalds's avatar
Linus Torvalds committed
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167

static const char *quirk_drives[] = {
	"QUANTUM FIREBALLlct08 08",
	"QUANTUM FIREBALLP KA6.4",
	"QUANTUM FIREBALLP LM20.4",
	"QUANTUM FIREBALLP LM20.5",
	NULL
};

static const char *bad_ata100_5[] = {
	"IBM-DTLA-307075",
	"IBM-DTLA-307060",
	"IBM-DTLA-307045",
	"IBM-DTLA-307030",
	"IBM-DTLA-307020",
	"IBM-DTLA-307015",
	"IBM-DTLA-305040",
	"IBM-DTLA-305030",
	"IBM-DTLA-305020",
	"IC35L010AVER07-0",
	"IC35L020AVER07-0",
	"IC35L030AVER07-0",
	"IC35L040AVER07-0",
	"IC35L060AVER07-0",
	"WDC AC310200R",
	NULL
};

static const char *bad_ata66_4[] = {
	"IBM-DTLA-307075",
	"IBM-DTLA-307060",
	"IBM-DTLA-307045",
	"IBM-DTLA-307030",
	"IBM-DTLA-307020",
	"IBM-DTLA-307015",
	"IBM-DTLA-305040",
	"IBM-DTLA-305030",
	"IBM-DTLA-305020",
	"IC35L010AVER07-0",
	"IC35L020AVER07-0",
	"IC35L030AVER07-0",
	"IC35L040AVER07-0",
	"IC35L060AVER07-0",
	"WDC AC310200R",
	NULL
};

static const char *bad_ata66_3[] = {
	"WDC AC310200R",
	NULL
};

static const char *bad_ata33[] = {
	"Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2",
	"Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2",
	"Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4",
	"Maxtor 90510D4",
	"Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2",
	"Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4",
	"Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2",
	NULL
};

168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
static u8 xfer_speeds[] = {
	XFER_UDMA_6,
	XFER_UDMA_5,
	XFER_UDMA_4,
	XFER_UDMA_3,
	XFER_UDMA_2,
	XFER_UDMA_1,
	XFER_UDMA_0,

	XFER_MW_DMA_2,
	XFER_MW_DMA_1,
	XFER_MW_DMA_0,

	XFER_PIO_4,
	XFER_PIO_3,
	XFER_PIO_2,
	XFER_PIO_1,
	XFER_PIO_0
Linus Torvalds's avatar
Linus Torvalds committed
186
187
};

188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
/* Key for bus clock timings
 * 36x   37x
 * bits  bits
 * 0:3	 0:3	data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
 *		cycles = value + 1
 * 4:7	 4:8	data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
 *		cycles = value + 1
 * 8:11  9:12	cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
 *		register access.
 * 12:15 13:17	cmd_low_time. Active time of DIOW_/DIOR_ during task file
 *		register access.
 * 16:18 18:20	udma_cycle_time. Clock cycles for UDMA xfer.
 * -	 21	CLK frequency: 0=ATA clock, 1=dual ATA clock.
 * 19:21 22:24	pre_high_time. Time to initialize the 1st cycle for PIO and
 *		MW DMA xfer.
 * 22:24 25:27	cmd_pre_high_time. Time to initialize the 1st PIO cycle for
 *		task file register access.
 * 28	 28	UDMA enable.
 * 29	 29	DMA  enable.
 * 30	 30	PIO MST enable. If set, the chip is in bus master mode during
 *		PIO xfer.
 * 31	 31	FIFO enable.
Linus Torvalds's avatar
Linus Torvalds committed
210
211
 */

212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
static u32 forty_base_hpt36x[] = {
	/* XFER_UDMA_6 */	0x900fd943,
	/* XFER_UDMA_5 */	0x900fd943,
	/* XFER_UDMA_4 */	0x900fd943,
	/* XFER_UDMA_3 */	0x900ad943,
	/* XFER_UDMA_2 */	0x900bd943,
	/* XFER_UDMA_1 */	0x9008d943,
	/* XFER_UDMA_0 */	0x9008d943,

	/* XFER_MW_DMA_2 */	0xa008d943,
	/* XFER_MW_DMA_1 */	0xa010d955,
	/* XFER_MW_DMA_0 */	0xa010d9fc,

	/* XFER_PIO_4 */	0xc008d963,
	/* XFER_PIO_3 */	0xc010d974,
	/* XFER_PIO_2 */	0xc010d997,
	/* XFER_PIO_1 */	0xc010d9c7,
	/* XFER_PIO_0 */	0xc018d9d9
Linus Torvalds's avatar
Linus Torvalds committed
230
231
};

232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
static u32 thirty_three_base_hpt36x[] = {
	/* XFER_UDMA_6 */	0x90c9a731,
	/* XFER_UDMA_5 */	0x90c9a731,
	/* XFER_UDMA_4 */	0x90c9a731,
	/* XFER_UDMA_3 */	0x90cfa731,
	/* XFER_UDMA_2 */	0x90caa731,
	/* XFER_UDMA_1 */	0x90cba731,
	/* XFER_UDMA_0 */	0x90c8a731,

	/* XFER_MW_DMA_2 */	0xa0c8a731,
	/* XFER_MW_DMA_1 */	0xa0c8a732,	/* 0xa0c8a733 */
	/* XFER_MW_DMA_0 */	0xa0c8a797,

	/* XFER_PIO_4 */	0xc0c8a731,
	/* XFER_PIO_3 */	0xc0c8a742,
	/* XFER_PIO_2 */	0xc0d0a753,
	/* XFER_PIO_1 */	0xc0d0a7a3,	/* 0xc0d0a793 */
	/* XFER_PIO_0 */	0xc0d0a7aa	/* 0xc0d0a7a7 */
Linus Torvalds's avatar
Linus Torvalds committed
250
251
};

252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
static u32 twenty_five_base_hpt36x[] = {
	/* XFER_UDMA_6 */	0x90c98521,
	/* XFER_UDMA_5 */	0x90c98521,
	/* XFER_UDMA_4 */	0x90c98521,
	/* XFER_UDMA_3 */	0x90cf8521,
	/* XFER_UDMA_2 */	0x90cf8521,
	/* XFER_UDMA_1 */	0x90cb8521,
	/* XFER_UDMA_0 */	0x90cb8521,

	/* XFER_MW_DMA_2 */	0xa0ca8521,
	/* XFER_MW_DMA_1 */	0xa0ca8532,
	/* XFER_MW_DMA_0 */	0xa0ca8575,

	/* XFER_PIO_4 */	0xc0ca8521,
	/* XFER_PIO_3 */	0xc0ca8532,
	/* XFER_PIO_2 */	0xc0ca8542,
	/* XFER_PIO_1 */	0xc0d08572,
	/* XFER_PIO_0 */	0xc0d08585
Linus Torvalds's avatar
Linus Torvalds committed
270
271
};

272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
static u32 thirty_three_base_hpt37x[] = {
	/* XFER_UDMA_6 */	0x12446231,	/* 0x12646231 ?? */
	/* XFER_UDMA_5 */	0x12446231,
	/* XFER_UDMA_4 */	0x12446231,
	/* XFER_UDMA_3 */	0x126c6231,
	/* XFER_UDMA_2 */	0x12486231,
	/* XFER_UDMA_1 */	0x124c6233,
	/* XFER_UDMA_0 */	0x12506297,

	/* XFER_MW_DMA_2 */	0x22406c31,
	/* XFER_MW_DMA_1 */	0x22406c33,
	/* XFER_MW_DMA_0 */	0x22406c97,

	/* XFER_PIO_4 */	0x06414e31,
	/* XFER_PIO_3 */	0x06414e42,
	/* XFER_PIO_2 */	0x06414e53,
	/* XFER_PIO_1 */	0x06814e93,
	/* XFER_PIO_0 */	0x06814ea7
Linus Torvalds's avatar
Linus Torvalds committed
290
291
};

292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
static u32 fifty_base_hpt37x[] = {
	/* XFER_UDMA_6 */	0x12848242,
	/* XFER_UDMA_5 */	0x12848242,
	/* XFER_UDMA_4 */	0x12ac8242,
	/* XFER_UDMA_3 */	0x128c8242,
	/* XFER_UDMA_2 */	0x120c8242,
	/* XFER_UDMA_1 */	0x12148254,
	/* XFER_UDMA_0 */	0x121882ea,

	/* XFER_MW_DMA_2 */	0x22808242,
	/* XFER_MW_DMA_1 */	0x22808254,
	/* XFER_MW_DMA_0 */	0x228082ea,

	/* XFER_PIO_4 */	0x0a81f442,
	/* XFER_PIO_3 */	0x0a81f443,
	/* XFER_PIO_2 */	0x0a81f454,
	/* XFER_PIO_1 */	0x0ac1f465,
	/* XFER_PIO_0 */	0x0ac1f48a
Linus Torvalds's avatar
Linus Torvalds committed
310
311
};

312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
static u32 sixty_six_base_hpt37x[] = {
	/* XFER_UDMA_6 */	0x1c869c62,
	/* XFER_UDMA_5 */	0x1cae9c62,	/* 0x1c8a9c62 */
	/* XFER_UDMA_4 */	0x1c8a9c62,
	/* XFER_UDMA_3 */	0x1c8e9c62,
	/* XFER_UDMA_2 */	0x1c929c62,
	/* XFER_UDMA_1 */	0x1c9a9c62,
	/* XFER_UDMA_0 */	0x1c829c62,

	/* XFER_MW_DMA_2 */	0x2c829c62,
	/* XFER_MW_DMA_1 */	0x2c829c66,
	/* XFER_MW_DMA_0 */	0x2c829d2e,

	/* XFER_PIO_4 */	0x0c829c62,
	/* XFER_PIO_3 */	0x0c829c84,
	/* XFER_PIO_2 */	0x0c829ca6,
	/* XFER_PIO_1 */	0x0d029d26,
	/* XFER_PIO_0 */	0x0d029d5e
Linus Torvalds's avatar
Linus Torvalds committed
330
331
332
333
334
335
};

#define HPT366_DEBUG_DRIVE_INFO		0
#define HPT374_ALLOW_ATA133_6		0
#define HPT371_ALLOW_ATA133_6		0
#define HPT302_ALLOW_ATA133_6		0
336
#define HPT372_ALLOW_ATA133_6		0
Linus Torvalds's avatar
Linus Torvalds committed
337
338
339
340
341
342
343
344
345
346
#define HPT370_ALLOW_ATA100_5		1
#define HPT366_ALLOW_ATA66_4		1
#define HPT366_ALLOW_ATA66_3		1
#define HPT366_MAX_DEVS			8

#define F_LOW_PCI_33	0x23
#define F_LOW_PCI_40	0x29
#define F_LOW_PCI_50	0x2d
#define F_LOW_PCI_66	0x42

347
348
349
350
/*
 *	Hold all the highpoint quirks and revision information in one
 *	place.
 */
Linus Torvalds's avatar
Linus Torvalds committed
351

352
353
354
355
356
357
struct hpt_info
{
	u8 max_mode;		/* Speeds allowed */
	int revision;		/* Chipset revision */
	int flags;		/* Chipset properties */
#define PLL_MODE	1
358
359
#define IS_3xxN 	2
#define PCI_66MHZ	4
360
				/* Speed table */
361
	u32 *speed;
362
363
364
365
366
367
368
369
370
};

/*
 *	This wants fixing so that we do everything not by classrev
 *	(which breaks on the newest chips) but by creating an
 *	enumeration of chip variants and using that
 */

static __devinit u32 hpt_revision (struct pci_dev *dev)
Linus Torvalds's avatar
Linus Torvalds committed
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
{
	u32 class_rev;
	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
	class_rev &= 0xff;

	switch(dev->device) {
		/* Remap new 372N onto 372 */
		case PCI_DEVICE_ID_TTI_HPT372N:
			class_rev = PCI_DEVICE_ID_TTI_HPT372; break;
		case PCI_DEVICE_ID_TTI_HPT374:
			class_rev = PCI_DEVICE_ID_TTI_HPT374; break;
		case PCI_DEVICE_ID_TTI_HPT371:
			class_rev = PCI_DEVICE_ID_TTI_HPT371; break;
		case PCI_DEVICE_ID_TTI_HPT302:
			class_rev = PCI_DEVICE_ID_TTI_HPT302; break;
		case PCI_DEVICE_ID_TTI_HPT372:
			class_rev = PCI_DEVICE_ID_TTI_HPT372; break;
		default:
			break;
	}
	return class_rev;
}

static int check_in_drive_lists(ide_drive_t *drive, const char **list);

static u8 hpt3xx_ratemask (ide_drive_t *drive)
{
398
399
	ide_hwif_t *hwif	= drive->hwif;
	struct hpt_info *info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
400
401
	u8 mode			= 0;

402
403
404
	/* FIXME: TODO - move this to set info->mode once at boot */

	if (info->revision >= 8) {		/* HPT374 */
Linus Torvalds's avatar
Linus Torvalds committed
405
		mode = (HPT374_ALLOW_ATA133_6) ? 4 : 3;
406
	} else if (info->revision >= 7) {	/* HPT371 */
Linus Torvalds's avatar
Linus Torvalds committed
407
		mode = (HPT371_ALLOW_ATA133_6) ? 4 : 3;
408
	} else if (info->revision >= 6) {	/* HPT302 */
Linus Torvalds's avatar
Linus Torvalds committed
409
		mode = (HPT302_ALLOW_ATA133_6) ? 4 : 3;
410
	} else if (info->revision >= 5) {	/* HPT372 */
Linus Torvalds's avatar
Linus Torvalds committed
411
		mode = (HPT372_ALLOW_ATA133_6) ? 4 : 3;
412
	} else if (info->revision >= 4) {	/* HPT370A */
Linus Torvalds's avatar
Linus Torvalds committed
413
		mode = (HPT370_ALLOW_ATA100_5) ? 3 : 2;
414
	} else if (info->revision >= 3) {	/* HPT370 */
Linus Torvalds's avatar
Linus Torvalds committed
415
416
417
418
419
		mode = (HPT370_ALLOW_ATA100_5) ? 3 : 2;
		mode = (check_in_drive_lists(drive, bad_ata33)) ? 0 : mode;
	} else {				/* HPT366 and HPT368 */
		mode = (check_in_drive_lists(drive, bad_ata33)) ? 0 : 2;
	}
420
	if (!eighty_ninty_three(drive) && mode)
Linus Torvalds's avatar
Linus Torvalds committed
421
422
423
424
425
426
427
428
429
430
431
		mode = min(mode, (u8)1);
	return mode;
}

/*
 *	Note for the future; the SATA hpt37x we must set
 *	either PIO or UDMA modes 0,4,5
 */
 
static u8 hpt3xx_ratefilter (ide_drive_t *drive, u8 speed)
{
432
433
	ide_hwif_t *hwif	= drive->hwif;
	struct hpt_info *info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
434
435
436
437
438
439
440
441
442
443
444
	u8 mode			= hpt3xx_ratemask(drive);

	if (drive->media != ide_disk)
		return min(speed, (u8)XFER_PIO_4);

	switch(mode) {
		case 0x04:
			speed = min(speed, (u8)XFER_UDMA_6);
			break;
		case 0x03:
			speed = min(speed, (u8)XFER_UDMA_5);
445
			if (info->revision >= 5)
Linus Torvalds's avatar
Linus Torvalds committed
446
447
448
449
450
451
452
453
454
				break;
			if (check_in_drive_lists(drive, bad_ata100_5))
				speed = min(speed, (u8)XFER_UDMA_4);
			break;
		case 0x02:
			speed = min(speed, (u8)XFER_UDMA_4);
	/*
	 * CHECK ME, Does this need to be set to 5 ??
	 */
455
			if (info->revision >= 3)
Linus Torvalds's avatar
Linus Torvalds committed
456
457
458
459
460
461
462
463
464
465
466
467
468
				break;
			if ((check_in_drive_lists(drive, bad_ata66_4)) ||
			    (!(HPT366_ALLOW_ATA66_4)))
				speed = min(speed, (u8)XFER_UDMA_3);
			if ((check_in_drive_lists(drive, bad_ata66_3)) ||
			    (!(HPT366_ALLOW_ATA66_3)))
				speed = min(speed, (u8)XFER_UDMA_2);
			break;
		case 0x01:
			speed = min(speed, (u8)XFER_UDMA_2);
	/*
	 * CHECK ME, Does this need to be set to 5 ??
	 */
469
			if (info->revision >= 3)
Linus Torvalds's avatar
Linus Torvalds committed
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
				break;
			if (check_in_drive_lists(drive, bad_ata33))
				speed = min(speed, (u8)XFER_MW_DMA_2);
			break;
		case 0x00:
		default:
			speed = min(speed, (u8)XFER_MW_DMA_2);
			break;
	}
	return speed;
}

static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
	struct hd_driveid *id = drive->id;

	if (quirk_drives == list) {
		while (*list)
			if (strstr(id->model, *list++))
				return 1;
	} else {
		while (*list)
			if (!strcmp(*list++,id->model))
				return 1;
	}
	return 0;
}

498
static u32 pci_bus_clock_list(u8 speed, u32 *chipset_table)
Linus Torvalds's avatar
Linus Torvalds committed
499
{
500
501
502
503
504
505
506
507
508
509
510
511
	int i;

	/*
	 * Lookup the transfer mode table to get the index into
	 * the timing table.
	 *
	 * NOTE: For XFER_PIO_SLOW, PIO mode 0 timings will be used.
	 */
	for (i = 0; i < ARRAY_SIZE(xfer_speeds) - 1; i++)
		if (xfer_speeds[i] == speed)
			break;
	return chipset_table[i];
Linus Torvalds's avatar
Linus Torvalds committed
512
513
514
515
}

static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed)
{
516
517
518
	ide_hwif_t *hwif	= drive->hwif;
	struct pci_dev *dev	= hwif->pci_dev;
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
519
520
	u8 speed		= hpt3xx_ratefilter(drive, xferspeed);
	u8 regtime		= (drive->select.b.unit & 0x01) ? 0x44 : 0x40;
521
	u8 regfast		= (hwif->channel) ? 0x55 : 0x51;
Linus Torvalds's avatar
Linus Torvalds committed
522
523
524
525
526
527
528
529
530
531
	u8 drive_fast		= 0;
	u32 reg1 = 0, reg2	= 0;

	/*
	 * Disable the "fast interrupt" prediction.
	 */
	pci_read_config_byte(dev, regfast, &drive_fast);
	if (drive_fast & 0x80)
		pci_write_config_byte(dev, regfast, drive_fast & ~0x80);

532
533
	reg2 = pci_bus_clock_list(speed, info->speed);

Linus Torvalds's avatar
Linus Torvalds committed
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
	/*
	 * Disable on-chip PIO FIFO/buffer
	 *  (to avoid problems handling I/O errors later)
	 */
	pci_read_config_dword(dev, regtime, &reg1);
	if (speed >= XFER_MW_DMA_0) {
		reg2 = (reg2 & ~0xc0000000) | (reg1 & 0xc0000000);
	} else {
		reg2 = (reg2 & ~0x30070000) | (reg1 & 0x30070000);
	}	
	reg2 &= ~0x80000000;

	pci_write_config_dword(dev, regtime, reg2);

	return ide_config_drive_speed(drive, speed);
}

static int hpt370_tune_chipset(ide_drive_t *drive, u8 xferspeed)
{
553
554
555
	ide_hwif_t *hwif	= drive->hwif;
	struct pci_dev *dev = hwif->pci_dev;
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
556
	u8 speed	= hpt3xx_ratefilter(drive, xferspeed);
557
	u8 regfast	= (drive->hwif->channel) ? 0x55 : 0x51;
Linus Torvalds's avatar
Linus Torvalds committed
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
	u8 drive_pci	= 0x40 + (drive->dn * 4);
	u8 new_fast	= 0, drive_fast = 0;
	u32 list_conf	= 0, drive_conf = 0;
	u32 conf_mask	= (speed >= XFER_MW_DMA_0) ? 0xc0000000 : 0x30070000;

	/*
	 * Disable the "fast interrupt" prediction.
	 * don't holdoff on interrupts. (== 0x01 despite what the docs say) 
	 */
	pci_read_config_byte(dev, regfast, &drive_fast);
	new_fast = drive_fast;
	if (new_fast & 0x02)
		new_fast &= ~0x02;

#ifdef HPT_DELAY_INTERRUPT
	if (new_fast & 0x01)
		new_fast &= ~0x01;
#else
	if ((new_fast & 0x01) == 0)
		new_fast |= 0x01;
#endif
	if (new_fast != drive_fast)
		pci_write_config_byte(dev, regfast, new_fast);

582
	list_conf = pci_bus_clock_list(speed, info->speed);
Linus Torvalds's avatar
Linus Torvalds committed
583
584
585
586

	pci_read_config_dword(dev, drive_pci, &drive_conf);
	list_conf = (list_conf & ~conf_mask) | (drive_conf & conf_mask);
	
587
	if (speed < XFER_MW_DMA_0)
Linus Torvalds's avatar
Linus Torvalds committed
588
589
590
591
592
593
594
595
		list_conf &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */
	pci_write_config_dword(dev, drive_pci, list_conf);

	return ide_config_drive_speed(drive, speed);
}

static int hpt372_tune_chipset(ide_drive_t *drive, u8 xferspeed)
{
596
597
598
	ide_hwif_t *hwif	= drive->hwif;
	struct pci_dev *dev	= hwif->pci_dev;
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
599
	u8 speed	= hpt3xx_ratefilter(drive, xferspeed);
600
	u8 regfast	= (drive->hwif->channel) ? 0x55 : 0x51;
Linus Torvalds's avatar
Linus Torvalds committed
601
602
603
604
605
606
607
608
609
610
611
	u8 drive_fast	= 0, drive_pci = 0x40 + (drive->dn * 4);
	u32 list_conf	= 0, drive_conf = 0;
	u32 conf_mask	= (speed >= XFER_MW_DMA_0) ? 0xc0000000 : 0x30070000;

	/*
	 * Disable the "fast interrupt" prediction.
	 * don't holdoff on interrupts. (== 0x01 despite what the docs say)
	 */
	pci_read_config_byte(dev, regfast, &drive_fast);
	drive_fast &= ~0x07;
	pci_write_config_byte(dev, regfast, drive_fast);
612
613

	list_conf = pci_bus_clock_list(speed, info->speed);
Linus Torvalds's avatar
Linus Torvalds committed
614
615
616
617
618
619
620
621
622
623
624
	pci_read_config_dword(dev, drive_pci, &drive_conf);
	list_conf = (list_conf & ~conf_mask) | (drive_conf & conf_mask);
	if (speed < XFER_MW_DMA_0)
		list_conf &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */
	pci_write_config_dword(dev, drive_pci, list_conf);

	return ide_config_drive_speed(drive, speed);
}

static int hpt3xx_tune_chipset (ide_drive_t *drive, u8 speed)
{
625
626
	ide_hwif_t *hwif	= drive->hwif;
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
627

628
	if (info->revision >= 8)
Linus Torvalds's avatar
Linus Torvalds committed
629
		return hpt372_tune_chipset(drive, speed); /* not a typo */
630
	else if (info->revision >= 5)
Linus Torvalds's avatar
Linus Torvalds committed
631
		return hpt372_tune_chipset(drive, speed);
632
	else if (info->revision >= 3)
Linus Torvalds's avatar
Linus Torvalds committed
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
		return hpt370_tune_chipset(drive, speed);
	else	/* hpt368: hpt_minimum_revision(dev, 2) */
		return hpt36x_tune_chipset(drive, speed);
}

static void hpt3xx_tune_drive (ide_drive_t *drive, u8 pio)
{
	pio = ide_get_best_pio_mode(drive, 255, pio, NULL);
	(void) hpt3xx_tune_chipset(drive, (XFER_PIO_0 + pio));
}

/*
 * This allows the configuration of ide_pci chipset registers
 * for cards that learn about the drive's UDMA, DMA, PIO capabilities
 * after the drive is reported by the OS.  Initially for designed for
 * HPT366 UDMA chipset by HighPoint|Triones Technologies, Inc.
 *
 * check_in_drive_lists(drive, bad_ata66_4)
 * check_in_drive_lists(drive, bad_ata66_3)
 * check_in_drive_lists(drive, bad_ata33)
 *
 */
static int config_chipset_for_dma (ide_drive_t *drive)
{
	u8 speed = ide_dma_speed(drive, hpt3xx_ratemask(drive));
658
659
	ide_hwif_t *hwif = drive->hwif;
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
660

661
662
663
664
665
	if (!speed)
		return 0;

	/* If we don't have any timings we can't do a lot */
	if (info->speed == NULL)
Linus Torvalds's avatar
Linus Torvalds committed
666
667
668
669
670
671
672
673
674
675
676
677
678
		return 0;

	(void) hpt3xx_tune_chipset(drive, speed);
	return ide_dma_enable(drive);
}

static int hpt3xx_quirkproc (ide_drive_t *drive)
{
	return ((int) check_in_drive_lists(drive, quirk_drives));
}

static void hpt3xx_intrproc (ide_drive_t *drive)
{
679
	ide_hwif_t *hwif = drive->hwif;
Linus Torvalds's avatar
Linus Torvalds committed
680
681
682
683
684
685
686
687
688

	if (drive->quirk_list)
		return;
	/* drives in the quirk_list may not like intr setups/cleanups */
	hwif->OUTB(drive->ctl|2, IDE_CONTROL_REG);
}

static void hpt3xx_maskproc (ide_drive_t *drive, int mask)
{
689
690
691
	ide_hwif_t *hwif = drive->hwif;
	struct hpt_info *info = ide_get_hwifdata(hwif);
	struct pci_dev *dev = hwif->pci_dev;
Linus Torvalds's avatar
Linus Torvalds committed
692
693

	if (drive->quirk_list) {
694
		if (info->revision >= 3) {
Linus Torvalds's avatar
Linus Torvalds committed
695
696
697
698
699
700
			u8 reg5a = 0;
			pci_read_config_byte(dev, 0x5a, &reg5a);
			if (((reg5a & 0x10) >> 4) != mask)
				pci_write_config_byte(dev, 0x5a, mask ? (reg5a | 0x10) : (reg5a & ~0x10));
		} else {
			if (mask) {
701
				disable_irq(hwif->irq);
Linus Torvalds's avatar
Linus Torvalds committed
702
			} else {
703
				enable_irq(hwif->irq);
Linus Torvalds's avatar
Linus Torvalds committed
704
705
706
707
			}
		}
	} else {
		if (IDE_CONTROL_REG)
708
			hwif->OUTB(mask ? (drive->ctl | 2) :
Linus Torvalds's avatar
Linus Torvalds committed
709
710
711
712
713
714
715
						 (drive->ctl & ~2),
						 IDE_CONTROL_REG);
	}
}

static int hpt366_config_drive_xfer_rate (ide_drive_t *drive)
{
716
	ide_hwif_t *hwif	= drive->hwif;
Linus Torvalds's avatar
Linus Torvalds committed
717
718
719
720
	struct hd_driveid *id	= drive->id;

	drive->init_speed = 0;

721
	if ((id->capability & 1) && drive->autodma) {
Linus Torvalds's avatar
Linus Torvalds committed
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796

		if (ide_use_dma(drive)) {
			if (config_chipset_for_dma(drive))
				return hwif->ide_dma_on(drive);
		}

		goto fast_ata_pio;

	} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
		hpt3xx_tune_drive(drive, 5);
		return hwif->ide_dma_off_quietly(drive);
	}
	/* IORDY not supported */
	return 0;
}

/*
 * This is specific to the HPT366 UDMA bios chipset
 * by HighPoint|Triones Technologies, Inc.
 */
static int hpt366_ide_dma_lostirq (ide_drive_t *drive)
{
	struct pci_dev *dev	= HWIF(drive)->pci_dev;
	u8 reg50h = 0, reg52h = 0, reg5ah = 0;

	pci_read_config_byte(dev, 0x50, &reg50h);
	pci_read_config_byte(dev, 0x52, &reg52h);
	pci_read_config_byte(dev, 0x5a, &reg5ah);
	printk("%s: (%s)  reg50h=0x%02x, reg52h=0x%02x, reg5ah=0x%02x\n",
		drive->name, __FUNCTION__, reg50h, reg52h, reg5ah);
	if (reg5ah & 0x10)
		pci_write_config_byte(dev, 0x5a, reg5ah & ~0x10);
	return __ide_dma_lostirq(drive);
}

static void hpt370_clear_engine (ide_drive_t *drive)
{
	u8 regstate = HWIF(drive)->channel ? 0x54 : 0x50;
	pci_write_config_byte(HWIF(drive)->pci_dev, regstate, 0x37);
	udelay(10);
}

static void hpt370_ide_dma_start(ide_drive_t *drive)
{
#ifdef HPT_RESET_STATE_ENGINE
	hpt370_clear_engine(drive);
#endif
	ide_dma_start(drive);
}

static int hpt370_ide_dma_end (ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	u8 dma_stat		= hwif->INB(hwif->dma_status);

	if (dma_stat & 0x01) {
		/* wait a little */
		udelay(20);
		dma_stat = hwif->INB(hwif->dma_status);
	}
	if ((dma_stat & 0x01) != 0) 
		/* fallthrough */
		(void) HWIF(drive)->ide_dma_timeout(drive);

	return __ide_dma_end(drive);
}

static void hpt370_lostirq_timeout (ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	u8 bfifo = 0, reginfo	= hwif->channel ? 0x56 : 0x52;
	u8 dma_stat = 0, dma_cmd = 0;

	pci_read_config_byte(HWIF(drive)->pci_dev, reginfo, &bfifo);
797
	printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo);
Linus Torvalds's avatar
Linus Torvalds committed
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
	hpt370_clear_engine(drive);
	/* get dma command mode */
	dma_cmd = hwif->INB(hwif->dma_command);
	/* stop dma */
	hwif->OUTB(dma_cmd & ~0x1, hwif->dma_command);
	dma_stat = hwif->INB(hwif->dma_status);
	/* clear errors */
	hwif->OUTB(dma_stat | 0x6, hwif->dma_status);
}

static int hpt370_ide_dma_timeout (ide_drive_t *drive)
{
	hpt370_lostirq_timeout(drive);
	hpt370_clear_engine(drive);
	return __ide_dma_timeout(drive);
}

static int hpt370_ide_dma_lostirq (ide_drive_t *drive)
{
	hpt370_lostirq_timeout(drive);
	hpt370_clear_engine(drive);
	return __ide_dma_lostirq(drive);
}

/* returns 1 if DMA IRQ issued, 0 otherwise */
static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	u16 bfifo		= 0;
	u8 reginfo		= hwif->channel ? 0x56 : 0x52;
	u8 dma_stat;

	pci_read_config_word(hwif->pci_dev, reginfo, &bfifo);
	if (bfifo & 0x1FF) {
//		printk("%s: %d bytes in FIFO\n", drive->name, bfifo);
		return 0;
	}

	dma_stat = hwif->INB(hwif->dma_status);
	/* return 1 if INTR asserted */
	if ((dma_stat & 4) == 4)
		return 1;

	if (!drive->waiting_for_dma)
		printk(KERN_WARNING "%s: (%s) called while not waiting\n",
				drive->name, __FUNCTION__);
	return 0;
}

static int hpt374_ide_dma_end (ide_drive_t *drive)
{
	struct pci_dev *dev	= HWIF(drive)->pci_dev;
	ide_hwif_t *hwif	= HWIF(drive);
	u8 msc_stat = 0, mscreg	= hwif->channel ? 0x54 : 0x50;
	u8 bwsr_stat = 0, bwsr_mask = hwif->channel ? 0x02 : 0x01;

	pci_read_config_byte(dev, 0x6a, &bwsr_stat);
	pci_read_config_byte(dev, mscreg, &msc_stat);
	if ((bwsr_stat & bwsr_mask) == bwsr_mask)
		pci_write_config_byte(dev, mscreg, msc_stat|0x30);
	return __ide_dma_end(drive);
}

/**
862
863
864
 *	hpt3xxn_set_clock	-	perform clock switching dance
 *	@hwif: hwif to switch
 *	@mode: clocking mode (0x21 for write, 0x23 otherwise)
Linus Torvalds's avatar
Linus Torvalds committed
865
 *
866
867
868
 *	Switch the DPLL clock on the HPT3xxN devices. This is a	right mess.
 *	NOTE: avoid touching the disabled primary channel on HPT371N -- it
 *	doesn't physically exist anyway...
Linus Torvalds's avatar
Linus Torvalds committed
869
 */
870
871

static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
Linus Torvalds's avatar
Linus Torvalds committed
872
{
873
874
875
876
877
878
879
880
	u8 mcr1, scr2 = hwif->INB(hwif->dma_master + 0x7b);

	if ((scr2 & 0x7f) == mode)
		return;

	/* MISC. control register 1 has the channel enable bit... */
	mcr1 = hwif->INB(hwif->dma_master + 0x70);

Linus Torvalds's avatar
Linus Torvalds committed
881
	/* Tristate the bus */
882
883
884
885
	if (mcr1 & 0x04)
		hwif->OUTB(0x80, hwif->dma_master + 0x73);
	hwif->OUTB(0x80, hwif->dma_master + 0x77);

Linus Torvalds's avatar
Linus Torvalds committed
886
	/* Switch clock and reset channels */
887
888
889
	hwif->OUTB(mode, hwif->dma_master + 0x7b);
	hwif->OUTB(0xc0, hwif->dma_master + 0x79);

Linus Torvalds's avatar
Linus Torvalds committed
890
	/* Reset state machines */
891
892
893
894
	if (mcr1 & 0x04)
		hwif->OUTB(0x37, hwif->dma_master + 0x70);
	hwif->OUTB(0x37, hwif->dma_master + 0x74);

Linus Torvalds's avatar
Linus Torvalds committed
895
	/* Complete reset */
896
897
	hwif->OUTB(0x00, hwif->dma_master + 0x79);

Linus Torvalds's avatar
Linus Torvalds committed
898
	/* Reconnect channels to bus */
899
900
901
	if (mcr1 & 0x04)
		hwif->OUTB(0x00, hwif->dma_master + 0x73);
	hwif->OUTB(0x00, hwif->dma_master + 0x77);
Linus Torvalds's avatar
Linus Torvalds committed
902
903
904
}

/**
905
 *	hpt3xxn_rw_disk		-	prepare for I/O
Linus Torvalds's avatar
Linus Torvalds committed
906
907
908
 *	@drive: drive for command
 *	@rq: block request structure
 *
909
 *	This is called when a disk I/O is issued to HPT3xxN.
Linus Torvalds's avatar
Linus Torvalds committed
910
911
912
 *	We need it because of the clock switching.
 */

913
static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
Linus Torvalds's avatar
Linus Torvalds committed
914
{
915
916
	ide_hwif_t *hwif	= HWIF(drive);
	u8 wantclock		= rq_data_dir(rq) ? 0x23 : 0x21;
Linus Torvalds's avatar
Linus Torvalds committed
917

918
	hpt3xxn_set_clock(hwif, wantclock);
Linus Torvalds's avatar
Linus Torvalds committed
919
920
921
}

/* 
922
 * Set/get power state for a drive.
Linus Torvalds's avatar
Linus Torvalds committed
923
 *
924
 * When we turn the power back on, we need to re-initialize things.
Linus Torvalds's avatar
Linus Torvalds committed
925
926
 */
#define TRISTATE_BIT  0x8000
927
928

static int hpt3xx_busproc(ide_drive_t *drive, int state)
Linus Torvalds's avatar
Linus Torvalds committed
929
{
930
	ide_hwif_t *hwif	= drive->hwif;
Linus Torvalds's avatar
Linus Torvalds committed
931
	struct pci_dev *dev	= hwif->pci_dev;
932
933
	u8  tristate, resetmask, bus_reg = 0;
	u16 tri_reg = 0;
Linus Torvalds's avatar
Linus Torvalds committed
934
935
936
937
938

	hwif->bus_state = state;

	if (hwif->channel) { 
		/* secondary channel */
939
940
		tristate  = 0x56;
		resetmask = 0x80;
Linus Torvalds's avatar
Linus Torvalds committed
941
942
	} else { 
		/* primary channel */
943
		tristate  = 0x52;
Linus Torvalds's avatar
Linus Torvalds committed
944
945
946
		resetmask = 0x40;
	}

947
	/* Grab the status. */
Linus Torvalds's avatar
Linus Torvalds committed
948
949
950
	pci_read_config_word(dev, tristate, &tri_reg);
	pci_read_config_byte(dev, 0x59, &bus_reg);

951
952
953
954
	/*
	 * Set the state. We don't set it if we don't need to do so.
	 * Make sure that the drive knows that it has failed if it's off.
	 */
Linus Torvalds's avatar
Linus Torvalds committed
955
956
	switch (state) {
	case BUSSTATE_ON:
957
		if (!(bus_reg & resetmask))
Linus Torvalds's avatar
Linus Torvalds committed
958
			return 0;
959
960
961
962
963
		hwif->drives[0].failures = hwif->drives[1].failures = 0;

		pci_write_config_byte(dev, 0x59, bus_reg & ~resetmask);
		pci_write_config_word(dev, tristate, tri_reg & ~TRISTATE_BIT);
		return 0;
Linus Torvalds's avatar
Linus Torvalds committed
964
	case BUSSTATE_OFF:
965
		if ((bus_reg & resetmask) && !(tri_reg & TRISTATE_BIT))
Linus Torvalds's avatar
Linus Torvalds committed
966
967
968
969
			return 0;
		tri_reg &= ~TRISTATE_BIT;
		break;
	case BUSSTATE_TRISTATE:
970
		if ((bus_reg & resetmask) &&  (tri_reg & TRISTATE_BIT))
Linus Torvalds's avatar
Linus Torvalds committed
971
972
973
			return 0;
		tri_reg |= TRISTATE_BIT;
		break;
974
975
	default:
		return -EINVAL;
Linus Torvalds's avatar
Linus Torvalds committed
976
977
	}

978
979
980
981
982
	hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
	hwif->drives[1].failures = hwif->drives[1].max_failures + 1;

	pci_write_config_word(dev, tristate, tri_reg);
	pci_write_config_byte(dev, 0x59, bus_reg | resetmask);
Linus Torvalds's avatar
Linus Torvalds committed
983
984
985
	return 0;
}

986
static void __devinit hpt366_clocking(ide_hwif_t *hwif)
Linus Torvalds's avatar
Linus Torvalds committed
987
{
988
989
990
991
992
993
994
995
	u32 reg1	= 0;
	struct hpt_info *info = ide_get_hwifdata(hwif);

	pci_read_config_dword(hwif->pci_dev, 0x40, &reg1);

	/* detect bus speed by looking at control reg timing: */
	switch((reg1 >> 8) & 7) {
		case 5:
996
			info->speed = forty_base_hpt36x;
997
998
			break;
		case 9:
999
			info->speed = twenty_five_base_hpt36x;
1000
1001
1002
			break;
		case 7:
		default:
1003
			info->speed = thirty_three_base_hpt36x;
1004
1005
1006
1007
1008
1009
1010
1011
			break;
	}
}

static void __devinit hpt37x_clocking(ide_hwif_t *hwif)
{
	struct hpt_info *info = ide_get_hwifdata(hwif);
	struct pci_dev *dev = hwif->pci_dev;
Linus Torvalds's avatar
Linus Torvalds committed
1012
1013
1014
	int adjust, i;
	u16 freq;
	u32 pll;
1015
	u8 reg5bh = 0, mcr1 = 0;
Linus Torvalds's avatar
Linus Torvalds committed
1016
1017
1018
	
	/*
	 * default to pci clock. make sure MA15/16 are set to output
1019
1020
1021
1022
1023
	 * to prevent drives having problems with 40-pin cables. Needed
	 * for some drives such as IBM-DTLA which will not enter ready
	 * state on reset when PDIAG is a input.
	 *
	 * ToDo: should we set 0x21 when using PLL mode ?
Linus Torvalds's avatar
Linus Torvalds committed
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
	 */
	pci_write_config_byte(dev, 0x5b, 0x23);

	/*
	 * set up the PLL. we need to adjust it so that it's stable. 
	 * freq = Tpll * 192 / Tpci
	 *
	 * Todo. For non x86 should probably check the dword is
	 * set to 0xABCDExxx indicating the BIOS saved f_CNT
	 */
	pci_read_config_word(dev, 0x78, &freq);
	freq &= 0x1FF;
	
	/*
1038
1039
	 * HPT3xxN chips use different PCI clock information.
	 * Currently we always set up the PLL for them.
Linus Torvalds's avatar
Linus Torvalds committed
1040
	 */
1041
1042

	if (info->flags & IS_3xxN) {
Linus Torvalds's avatar
Linus Torvalds committed
1043
1044
1045
1046
1047
1048
1049
1050
		if(freq < 0x55)
			pll = F_LOW_PCI_33;
		else if(freq < 0x70)
			pll = F_LOW_PCI_40;
		else if(freq < 0x7F)
			pll = F_LOW_PCI_50;
		else
			pll = F_LOW_PCI_66;
1051
1052

		printk(KERN_INFO "HPT3xxN detected, FREQ: %d, PLL: %d\n", freq, pll);
Linus Torvalds's avatar
Linus Torvalds committed
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
	}
	else
	{
		if(freq < 0x9C)
			pll = F_LOW_PCI_33;
		else if(freq < 0xb0)
			pll = F_LOW_PCI_40;
		else if(freq <0xc8)
			pll = F_LOW_PCI_50;
		else
			pll = F_LOW_PCI_66;
	
		if (pll == F_LOW_PCI_33) {
1066
			info->speed = thirty_three_base_hpt37x;
1067
			printk(KERN_DEBUG "HPT37X: using 33MHz PCI clock\n");
Linus Torvalds's avatar
Linus Torvalds committed
1068
1069
1070
		} else if (pll == F_LOW_PCI_40) {
			/* Unsupported */
		} else if (pll == F_LOW_PCI_50) {
1071
			info->speed = fifty_base_hpt37x;
1072
			printk(KERN_DEBUG "HPT37X: using 50MHz PCI clock\n");
Linus Torvalds's avatar
Linus Torvalds committed
1073
		} else {
1074
1075
			info->speed = sixty_six_base_hpt37x;
			printk(KERN_DEBUG "HPT37X: using 66MHz PCI clock\n");
Linus Torvalds's avatar
Linus Torvalds committed
1076
1077
		}
	}
1078
1079
1080
1081

	if (pll == F_LOW_PCI_66)
		info->flags |= PCI_66MHZ;

Linus Torvalds's avatar
Linus Torvalds committed
1082
1083
1084
1085
1086
1087
	/*
	 * only try the pll if we don't have a table for the clock
	 * speed that we're running at. NOTE: the internal PLL will
	 * result in slow reads when using a 33MHz PCI clock. we also
	 * don't like to use the PLL because it will cause glitches
	 * on PRST/SRST when the HPT state engine gets reset.
1088
1089
1090
	 *
	 * ToDo: Use 66MHz PLL when ATA133 devices are present on a
	 * 372 device so we can get ATA133 support
Linus Torvalds's avatar
Linus Torvalds committed
1091
	 */
1092
	if (info->speed)
Linus Torvalds's avatar
Linus Torvalds committed
1093
		goto init_hpt37X_done;
1094
1095

	info->flags |= PLL_MODE;
Linus Torvalds's avatar
Linus Torvalds committed
1096
1097
	
	/*
1098
1099
1100
	 * FIXME: make this work correctly, esp with 372N as per
	 * reference driver code.
	 *
Linus Torvalds's avatar
Linus Torvalds committed
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
	 * adjust PLL based upon PCI clock, enable it, and wait for
	 * stabilization.
	 */
	adjust = 0;
	freq = (pll < F_LOW_PCI_50) ? 2 : 4;
	while (adjust++ < 6) {
		pci_write_config_dword(dev, 0x5c, (freq + pll) << 16 |
				       pll | 0x100);

		/* wait for clock stabilization */
		for (i = 0; i < 0x50000; i++) {
			pci_read_config_byte(dev, 0x5b, &reg5bh);
			if (reg5bh & 0x80) {
				/* spin looking for the clock to destabilize */
				for (i = 0; i < 0x1000; ++i) {
					pci_read_config_byte(dev, 0x5b, 
							     &reg5bh);
					if ((reg5bh & 0x80) == 0)
						goto pll_recal;
				}
				pci_read_config_dword(dev, 0x5c, &pll);
				pci_write_config_dword(dev, 0x5c, 
						       pll & ~0x100);
				pci_write_config_byte(dev, 0x5b, 0x21);
1125
1126

				info->speed = fifty_base_hpt37x;
Linus Torvalds's avatar
Linus Torvalds committed
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
				printk("HPT37X: using 50MHz internal PLL\n");
				goto init_hpt37X_done;
			}
		}
pll_recal:
		if (adjust & 1)
			pll -= (adjust >> 1);
		else
			pll += (adjust >> 1);
	} 

init_hpt37X_done:
1139
	if (!info->speed)
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
		printk(KERN_ERR "HPT37x%s: unknown bus timing [%d %d].\n",
		       (info->flags & IS_3xxN) ? "N" : "", pll, freq);
	/*
	 * Reset the state engines.
	 * NOTE: avoid accidentally enabling the primary channel on HPT371N.
	 */
	pci_read_config_byte(dev, 0x50, &mcr1);
	if (mcr1 & 0x04)
		pci_write_config_byte(dev, 0x50, 0x37);
	pci_write_config_byte(dev, 0x54, 0x37);
Linus Torvalds's avatar
Linus Torvalds committed
1150
	udelay(100);
1151
1152
1153
1154
1155
1156
1157
1158
1159
}

static int __devinit init_hpt37x(struct pci_dev *dev)
{
	u8 reg5ah;

	pci_read_config_byte(dev, 0x5a, &reg5ah);
	/* interrupt force enable */
	pci_write_config_byte(dev, 0x5a, (reg5ah & ~0x10));
Linus Torvalds's avatar
Linus Torvalds committed
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
	return 0;
}

static int __devinit init_hpt366(struct pci_dev *dev)
{
	u32 reg1	= 0;
	u8 drive_fast	= 0;

	/*
	 * Disable the "fast interrupt" prediction.
	 */
	pci_read_config_byte(dev, 0x51, &drive_fast);
	if (drive_fast & 0x80)
		pci_write_config_byte(dev, 0x51, drive_fast & ~0x80);
	pci_read_config_dword(dev, 0x40, &reg1);
									
	return 0;
}

static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name)
{
	int ret = 0;
1182
1183
1184
1185
1186

	/*
	 * FIXME: Not portable. Also, why do we enable the ROM in the first place?
	 * We don't seem to be using it.
	 */
Linus Torvalds's avatar
Linus Torvalds committed
1187
	if (dev->resource[PCI_ROM_RESOURCE].start)
1188
		pci_write_config_dword(dev, PCI_ROM_ADDRESS,
Linus Torvalds's avatar
Linus Torvalds committed
1189
1190
			dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);

1191
1192
1193
1194
	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4));
	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78);
	pci_write_config_byte(dev, PCI_MIN_GNT, 0x08);
	pci_write_config_byte(dev, PCI_MAX_LAT, 0x08);
Linus Torvalds's avatar
Linus Torvalds committed
1195

1196
	if (hpt_revision(dev) >= 3)
Linus Torvalds's avatar
Linus Torvalds committed
1197
		ret = init_hpt37x(dev);
1198
1199
1200
	else
		ret = init_hpt366(dev);

Linus Torvalds's avatar
Linus Torvalds committed
1201
1202
1203
1204
1205
1206
1207
1208
1209
	if (ret)
		return ret;

	return dev->irq;
}

static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
{
	struct pci_dev *dev		= hwif->pci_dev;
1210
	struct hpt_info *info		= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
1211
	u8 ata66 = 0, regmask		= (hwif->channel) ? 0x01 : 0x02;
1212
	int serialize			= HPT_SERIALIZE_IO;
Linus Torvalds's avatar
Linus Torvalds committed
1213
1214
1215
1216
1217
1218
1219
	
	hwif->tuneproc			= &hpt3xx_tune_drive;
	hwif->speedproc			= &hpt3xx_tune_chipset;
	hwif->quirkproc			= &hpt3xx_quirkproc;
	hwif->intrproc			= &hpt3xx_intrproc;
	hwif->maskproc			= &hpt3xx_maskproc;
	
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
	/*
	 * HPT3xxN chips have some complications:
	 *
	 * - on 33 MHz PCI we must clock switch
	 * - on 66 MHz PCI we must NOT use the PCI clock
	 */
	if ((info->flags & (IS_3xxN | PCI_66MHZ)) == IS_3xxN) {
		/*
		 * Clock is shared between the channels,
		 * so we'll have to serialize them... :-(
		 */
		serialize = 1;
		hwif->rw_disk = &hpt3xxn_rw_disk;
	}
Linus Torvalds's avatar
Linus Torvalds committed
1234
1235
1236
1237
1238
1239

	/*
	 * The HPT37x uses the CBLID pins as outputs for MA15/MA16
	 * address lines to access an external eeprom.  To read valid
	 * cable detect state the pins must be enabled as inputs.
	 */
1240
	if (info->revision >= 8 && (PCI_FUNC(dev->devfn) & 1)) {
Linus Torvalds's avatar
Linus Torvalds committed
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
		/*
		 * HPT374 PCI function 1
		 * - set bit 15 of reg 0x52 to enable TCBLID as input
		 * - set bit 15 of reg 0x56 to enable FCBLID as input
		 */
		u16 mcr3, mcr6;
		pci_read_config_word(dev, 0x52, &mcr3);
		pci_read_config_word(dev, 0x56, &mcr6);
		pci_write_config_word(dev, 0x52, mcr3 | 0x8000);
		pci_write_config_word(dev, 0x56, mcr6 | 0x8000);
		/* now read cable id register */
		pci_read_config_byte(dev, 0x5a, &ata66);
		pci_write_config_word(dev, 0x52, mcr3);
		pci_write_config_word(dev, 0x56, mcr6);
1255
	} else if (info->revision >= 3) {
Linus Torvalds's avatar
Linus Torvalds committed
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
		/*
		 * HPT370/372 and 374 pcifn 0
		 * - clear bit 0 of 0x5b to enable P/SCBLID as inputs
		 */
		u8 scr2;
		pci_read_config_byte(dev, 0x5b, &scr2);
		pci_write_config_byte(dev, 0x5b, scr2 & ~1);
		/* now read cable id register */
		pci_read_config_byte(dev, 0x5a, &ata66);
		pci_write_config_byte(dev, 0x5b, scr2);
	} else {
		pci_read_config_byte(dev, 0x5a, &ata66);
	}

#ifdef DEBUG
	printk("HPT366: reg5ah=0x%02x ATA-%s Cable Port%d\n",
		ata66, (ata66 & regmask) ? "33" : "66",
		PCI_FUNC(hwif->pci_dev->devfn));
#endif /* DEBUG */

1276
1277
	/* Serialize access to this device */
	if (serialize && hwif->mate)
Linus Torvalds's avatar
Linus Torvalds committed
1278
1279
		hwif->serialized = hwif->mate->serialized = 1;

1280
1281
1282
1283
1284
	/*
	 * Set up ioctl for power status.
	 * NOTE:  power affects both drives on each channel.
	 */
	hwif->busproc = &hpt3xx_busproc;
Linus Torvalds's avatar
Linus Torvalds committed
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298

	if (!hwif->dma_base) {
		hwif->drives[0].autotune = 1;
		hwif->drives[1].autotune = 1;
		return;
	}

	hwif->ultra_mask = 0x7f;
	hwif->mwdma_mask = 0x07;

	if (!(hwif->udma_four))
		hwif->udma_four = ((ata66 & regmask) ? 0 : 1);
	hwif->ide_dma_check = &hpt366_config_drive_xfer_rate;

1299
	if (info->revision >= 8) {
Linus Torvalds's avatar
Linus Torvalds committed
1300
1301
		hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
		hwif->ide_dma_end = &hpt374_ide_dma_end;
1302
	} else if (info->revision >= 5) {
Linus Torvalds's avatar
Linus Torvalds committed
1303
1304
		hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
		hwif->ide_dma_end = &hpt374_ide_dma_end;
1305
	} else if (info->revision >= 3) {
Linus Torvalds's avatar
Linus Torvalds committed
1306
1307
1308
1309
		hwif->dma_start = &hpt370_ide_dma_start;
		hwif->ide_dma_end = &hpt370_ide_dma_end;
		hwif->ide_dma_timeout = &hpt370_ide_dma_timeout;
		hwif->ide_dma_lostirq = &hpt370_ide_dma_lostirq;
1310
	} else if (info->revision >= 2)
Linus Torvalds's avatar
Linus Torvalds committed
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
		hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq;
	else
		hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq;

	if (!noautodma)
		hwif->autodma = 1;
	hwif->drives[0].autodma = hwif->autodma;
	hwif->drives[1].autodma = hwif->autodma;
}

static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
{
1323
	struct hpt_info	*info	= ide_get_hwifdata(hwif);
Linus Torvalds's avatar
Linus Torvalds committed
1324
1325
1326
1327
1328
1329
1330
1331
1332
	u8 masterdma	= 0, slavedma = 0;
	u8 dma_new	= 0, dma_old = 0;
	u8 primary	= hwif->channel ? 0x4b : 0x43;
	u8 secondary	= hwif->channel ? 0x4f : 0x47;
	unsigned long flags;

	if (!dmabase)
		return;
		
1333
	if(info->speed == NULL) {
1334
		printk(KERN_WARNING "hpt366: no known IDE timings, disabling DMA.\n");
Linus Torvalds's avatar
Linus Torvalds committed
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
		return;
	}

	dma_old = hwif->INB(dmabase+2);

	local_irq_save(flags);

	dma_new = dma_old;
	pci_read_config_byte(hwif->pci_dev, primary, &masterdma);
	pci_read_config_byte(hwif->pci_dev, secondary, &slavedma);

	if (masterdma & 0x30)	dma_new |= 0x20;
	if (slavedma & 0x30)	dma_new |= 0x40;
	if (dma_new != dma_old)
		hwif->OUTB(dma_new, dmabase+2);

	local_irq_restore(flags);

	ide_setup_dma(hwif, dmabase, 8);
}

1356
1357
1358
1359
1360
1361
1362
/*
 *	We "borrow" this hook in order to set the data structures
 *	up early enough before dma or init_hwif calls are made.
 */

static void __devinit init_iops_hpt366(ide_hwif_t *hwif)
{
1363
1364
1365
1366
	struct hpt_info *info	= kzalloc(sizeof(struct hpt_info), GFP_KERNEL);
	struct pci_dev  *dev	= hwif->pci_dev;
	u16 did			= dev->device;
	u8  rid			= 0;
1367
1368
1369
1370
1371
1372
1373

	if(info == NULL) {
		printk(KERN_WARNING "hpt366: out of memory.\n");
		return;
	}
	ide_set_hwifdata(hwif, info);

1374
1375
1376
1377
	/* Avoid doing the same thing twice. */
	if (hwif->channel && hwif->mate) {
		memcpy(info, ide_get_hwifdata(hwif->mate), sizeof(struct hpt_info));
		return;
1378
1379
	}

1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
	pci_read_config_byte(dev, PCI_CLASS_REVISION, &rid);

	if (( did == PCI_DEVICE_ID_TTI_HPT366  && rid == 6) ||
	    ((did == PCI_DEVICE_ID_TTI_HPT372  ||
	      did == PCI_DEVICE_ID_TTI_HPT302  ||
	      did == PCI_DEVICE_ID_TTI_HPT371) && rid > 1) ||
	      did == PCI_DEVICE_ID_TTI_HPT372N)
		info->flags |= IS_3xxN;

	info->revision = hpt_revision(dev);
1390
1391
1392
1393
1394
1395
1396

	if (info->revision >= 3)
		hpt37x_clocking(hwif);
	else
		hpt366_clocking(hwif);
}

Linus Torvalds's avatar
Linus Torvalds committed
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
static int __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d)
{
	struct pci_dev *findev = NULL;

	if (PCI_FUNC(dev->devfn) & 1)
		return -ENODEV;

	while ((findev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
		if ((findev->vendor == dev->vendor) &&
		    (findev->device == dev->device) &&
		    ((findev->devfn - dev->devfn) == 1) &&
		    (PCI_FUNC(findev->devfn) & 1)) {
			if (findev->irq != dev->irq) {
				/* FIXME: we need a core pci_set_interrupt() */
				findev->irq = dev->irq;
				printk(KERN_WARNING "%s: pci-config space interrupt "
					"fixed.\n", d->name);
			}
			return ide_setup_pci_devices(dev, findev, d);
		}
	}
	return ide_setup_pci_device(dev, d);
}

static int __devinit init_setup_hpt37x(struct pci_dev *dev, ide_pci_device_t *d)
{
	return ide_setup_pci_device(dev, d);
}

1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d)
{
	u8 mcr1 = 0;

	/*
	 * HPT371 chips physically have only one channel, the secondary one,
	 * but the primary channel registers do exist!  Go figure...
	 * So,  we manually disable the non-existing channel here
	 * (if the BIOS hasn't done this already).
	 */
	pci_read_config_byte(dev, 0x50, &mcr1);
	if (mcr1 & 0x04)
		pci_write_config_byte(dev, 0x50, (mcr1 & ~0x04));

	return ide_setup_pci_device(dev, d);
}

Linus Torvalds's avatar
Linus Torvalds committed
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
{
	struct pci_dev *findev = NULL;
	u8 pin1 = 0, pin2 = 0;
	unsigned int class_rev;
	char *chipset_names[] = {"HPT366", "HPT366",  "HPT368",
				 "HPT370", "HPT370A", "HPT372",
				 "HPT372N" };

	if (PCI_FUNC(dev->devfn) & 1)
		return -ENODEV;

	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
	class_rev &= 0xff;

	if(dev->device == PCI_DEVICE_ID_TTI_HPT372N)
		class_rev = 6;
		
	if(class_rev <= 6)
		d->name = chipset_names[class_rev];

	switch(class_rev) {
		case 6:
		case 5:
		case 4:
		case 3:
			goto init_single;
		default:
			break;
	}

	d->channels = 1;

	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1);
	while ((findev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
		if ((findev->vendor == dev->vendor) &&
		    (findev->device == dev->device) &&
		    ((findev->devfn - dev->devfn) == 1) &&
		    (PCI_FUNC(findev->devfn) & 1)) {
			pci_read_config_byte(findev, PCI_INTERRUPT_PIN, &pin2);
			if ((pin1 != pin2) && (dev->irq == findev->irq)) {
				d->bootable = ON_BOARD;
				printk("%s: onboard version of chipset, "
					"pin1=%d pin2=%d\n", d->name,
					pin1, pin2);
			}
			return ide_setup_pci_devices(dev, findev, d);
		}
	}
init_single:
	return ide_setup_pci_device(dev, d);
}

static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
	{	/* 0 */
		.name		= "HPT366",
		.init_setup	= init_setup_hpt366,
		.init_chipset	= init_chipset_hpt366,
1501
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
		.extra		= 240
	},{	/* 1 */
		.name		= "HPT372A",
		.init_setup	= init_setup_hpt37x,
		.init_chipset	= init_chipset_hpt366,
1512
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1513
1514
1515
1516
1517
1518
1519
1520
1521
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 2 */
		.name		= "HPT302",
		.init_setup	= init_setup_hpt37x,
		.init_chipset	= init_chipset_hpt366,
1522
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1523
1524
1525
1526
1527
1528
1529
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 3 */
		.name		= "HPT371",
1530
		.init_setup	= init_setup_hpt371,
Linus Torvalds's avatar
Linus Torvalds committed
1531
		.init_chipset	= init_chipset_hpt366,
1532
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1533
1534
1535
1536
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,
		.autodma	= AUTODMA,
1537
		.enablebits	= {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
Linus Torvalds's avatar
Linus Torvalds committed
1538
1539
1540
1541
1542
		.bootable	= OFF_BOARD,
	},{	/* 4 */
		.name		= "HPT374",
		.init_setup	= init_setup_hpt374,
		.init_chipset	= init_chipset_hpt366,
1543
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1544
1545
1546
1547
1548
1549
1550
1551
1552
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,	/* 4 */
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 5 */
		.name		= "HPT372N",
		.init_setup	= init_setup_hpt37x,
		.init_chipset	= init_chipset_hpt366,
1553
		.init_iops	= init_iops_hpt366,
Linus Torvalds's avatar
Linus Torvalds committed
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
		.init_hwif	= init_hwif_hpt366,
		.init_dma	= init_dma_hpt366,
		.channels	= 2,	/* 4 */
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	}
};

/**
 *	hpt366_init_one	-	called when an HPT366 is found
 *	@dev: the hpt366 device
 *	@id: the matching pci id
 *
 *	Called when the PCI registration layer (or the IDE initialization)
 *	finds a device matching our IDE device tables.
1569
1570
1571
1572
 *
 *	NOTE: since we'll have to modify some fields of the ide_pci_device_t
 *	structure depending on the chip's revision, we'd better pass a local
 *	copy down the call chain...
Linus Torvalds's avatar
Linus Torvalds committed
1573
1574
1575
 */
static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
1576
	ide_pci_device_t d = hpt366_chipsets[id->driver_data];
Linus Torvalds's avatar
Linus Torvalds committed
1577

1578
	return d.init_setup(dev, &d);
Linus Torvalds's avatar
Linus Torvalds committed
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
}

static struct pci_device_id hpt366_pci_tbl[] = {
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT366, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT374, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
	{ PCI_VENDOR_ID_TTI, PCI_DEVICE_ID_TTI_HPT372N, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, hpt366_pci_tbl);

static struct pci_driver driver = {
	.name		= "HPT366_IDE",
	.id_table	= hpt366_pci_tbl,
	.probe		= hpt366_init_one,
};

static int hpt366_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(hpt366_ide_init);

MODULE_AUTHOR("Andre Hedrick");
MODULE_DESCRIPTION("PCI driver module for Highpoint HPT366 IDE");
MODULE_LICENSE("GPL");