iwl-dev.h 42 KB
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/******************************************************************************
 *
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 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
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 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
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 *  Intel Linux Wireless <ilw@linux.intel.com>
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 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 *****************************************************************************/
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/*
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 * Please use this file (iwl-dev.h) for driver implementation definitions.
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 * Please use iwl-commands.h for uCode API definitions.
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 */

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#ifndef __iwl_dev_h__
#define __iwl_dev_h__
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#include <linux/pci.h> /* for struct pci_device_id */
#include <linux/kernel.h>
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#include <linux/wait.h>
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#include <linux/leds.h>
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#include <net/ieee80211_radiotap.h>

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#include "iwl-eeprom.h"
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#include "iwl-csr.h"
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#include "iwl-prph.h"
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#include "iwl-fh.h"
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#include "iwl-debug.h"
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#include "iwl-agn-hw.h"
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#include "iwl-led.h"
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#include "iwl-power.h"
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#include "iwl-agn-rs.h"
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#include "iwl-agn-tt.h"
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#define U32_PAD(n)		((4-(n))&0x3)

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struct iwl_tx_queue;

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/* CT-KILL constants */
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#define CT_KILL_THRESHOLD_LEGACY   110 /* in Celsius */
#define CT_KILL_THRESHOLD	   114 /* in Celsius */
#define CT_KILL_EXIT_THRESHOLD     95  /* in Celsius */
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/* Default noise level to report when noise measurement is not available.
 *   This may be because we're:
 *   1)  Not associated (4965, no beacon statistics being sent to driver)
 *   2)  Scanning (noise measurement does not apply to associated channel)
 *   3)  Receiving CCK (3945 delivers noise info only for OFDM frames)
 * Use default noise value of -127 ... this is below the range of measurable
 *   Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
 *   Also, -127 works better than 0 when averaging frames with/without
 *   noise info (e.g. averaging might be done in app); measured dBm values are
 *   always negative ... using a negative value as the default keeps all
 *   averages within an s8's (used in some apps) range of negative values. */
#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)

/*
 * RTS threshold here is total size [2347] minus 4 FCS bytes
 * Per spec:
 *   a value of 0 means RTS on all data/management packets
 *   a value > max MSDU size means no RTS
 * else RTS for data/management frames where MPDU is larger
 *   than RTS value.
 */
#define DEFAULT_RTS_THRESHOLD     2347U
#define MIN_RTS_THRESHOLD         0U
#define MAX_RTS_THRESHOLD         2347U
#define MAX_MSDU_SIZE		  2304U
#define MAX_MPDU_SIZE		  2346U
#define DEFAULT_BEACON_INTERVAL   100U
#define	DEFAULT_SHORT_RETRY_LIMIT 7U
#define	DEFAULT_LONG_RETRY_LIMIT  4U

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struct iwl_rx_mem_buffer {
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	dma_addr_t page_dma;
	struct page *page;
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	struct list_head list;
};

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#define rxb_addr(r) page_address(r->page)

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/* defined below */
struct iwl_device_cmd;

struct iwl_cmd_meta {
	/* only for SYNC commands, iff the reply skb is wanted */
	struct iwl_host_cmd *source;
	/*
	 * only for ASYNC commands
	 * (which is somewhat stupid -- look at iwl-sta.c for instance
	 * which duplicates a bunch of code because the callback isn't
	 * invoked for SYNC commands, if it were and its result passed
	 * through it would be simpler...)
	 */
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	void (*callback)(struct iwl_priv *priv,
			 struct iwl_device_cmd *cmd,
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			 struct iwl_rx_packet *pkt);
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	/* The CMD_SIZE_HUGE flag bit indicates that the command
	 * structure is stored at the end of the shared queue memory. */
	u32 flags;

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	DEFINE_DMA_UNMAP_ADDR(mapping);
	DEFINE_DMA_UNMAP_LEN(len);
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};

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/*
 * Generic queue structure
 *
 * Contains common data for Rx and Tx queues
 */
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struct iwl_queue {
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	int n_bd;              /* number of BDs in this queue */
	int write_ptr;       /* 1-st empty entry (index) host_w*/
	int read_ptr;         /* last used entry (index) host_r*/
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	/* use for monitoring and recovering the stuck queue */
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	dma_addr_t dma_addr;   /* physical addr for BD's */
	int n_window;	       /* safe queue window */
	u32 id;
	int low_mark;	       /* low watermark, resume queue if free
				* space more than this */
	int high_mark;         /* high watermark, stop queue if free
				* space less than this */
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};
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/* One for each TFD */
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struct iwl_tx_info {
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	struct sk_buff *skb;
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	struct iwl_rxon_context *ctx;
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};

/**
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 * struct iwl_tx_queue - Tx Queue for DMA
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 * @q: generic Rx/Tx queue descriptor
 * @bd: base of circular buffer of TFDs
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 * @cmd: array of command/TX buffer pointers
 * @meta: array of meta data for each command/tx buffer
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 * @dma_addr_cmd: physical address of cmd/tx buffer array
 * @txb: array of per-TFD driver data
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 * @time_stamp: time (in jiffies) of last read_ptr change
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 * @need_update: indicates need to update read/write index
 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
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 *
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 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
 * descriptors) and required locking structures.
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 */
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#define TFD_TX_CMD_SLOTS 256
#define TFD_CMD_SLOTS 32

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struct iwl_tx_queue {
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	struct iwl_queue q;
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	void *tfds;
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	struct iwl_device_cmd **cmd;
	struct iwl_cmd_meta *meta;
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	struct iwl_tx_info *txb;
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	unsigned long time_stamp;
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	u8 need_update;
	u8 sched_retry;
	u8 active;
	u8 swq_id;
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};

#define IWL_NUM_SCAN_RATES         (2)

/*
 * One for each channel, holds all channel setup data
 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
 *     with one another!
 */
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struct iwl_channel_info {
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	struct iwl_eeprom_channel eeprom;	/* EEPROM regulatory limit */
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	struct iwl_eeprom_channel ht40_eeprom;	/* EEPROM regulatory limit for
						 * HT40 channel */
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	u8 channel;	  /* channel number */
	u8 flags;	  /* flags copied from EEPROM */
	s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
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	s8 curr_txpow;	  /* (dBm) regulatory/spectrum/user (not h/w) limit */
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	s8 min_power;	  /* always 0 */
	s8 scan_power;	  /* (dBm) regul. eeprom, direct scans, any rate */

	u8 group_index;	  /* 0-4, maps channel to group1/2/3/4/5 */
	u8 band_index;	  /* 0-4, maps channel to band1/2/3/4/5 */
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	enum ieee80211_band band;
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	/* HT40 channel info */
	s8 ht40_max_power_avg;	/* (dBm) regul. eeprom, normal Tx, any rate */
	u8 ht40_flags;		/* flags copied from EEPROM */
	u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
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};

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#define IWL_TX_FIFO_BK		0	/* shared */
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#define IWL_TX_FIFO_BE		1
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#define IWL_TX_FIFO_VI		2	/* shared */
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#define IWL_TX_FIFO_VO		3
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#define IWL_TX_FIFO_BK_IPAN	IWL_TX_FIFO_BK
#define IWL_TX_FIFO_BE_IPAN	4
#define IWL_TX_FIFO_VI_IPAN	IWL_TX_FIFO_VI
#define IWL_TX_FIFO_VO_IPAN	5
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#define IWL_TX_FIFO_UNUSED	-1
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/* Minimum number of queues. MAX_NUM is defined in hw specific files.
 * Set the minimum to accommodate the 4 standard TX queues, 1 command
 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
#define IWL_MIN_NUM_QUEUES	10
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/*
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 * Command queue depends on iPAN support.
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 */
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#define IWL_DEFAULT_CMD_QUEUE_NUM	4
#define IWL_IPAN_CMD_QUEUE_NUM		9
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/*
 * This queue number is required for proper operation
 * because the ucode will stop/start the scheduler as
 * required.
 */
#define IWL_IPAN_MCAST_QUEUE		8

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#define IEEE80211_DATA_LEN              2304
#define IEEE80211_4ADDR_LEN             30
#define IEEE80211_HLEN                  (IEEE80211_4ADDR_LEN)
#define IEEE80211_FRAME_LEN             (IEEE80211_DATA_LEN + IEEE80211_HLEN)

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struct iwl_frame {
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	union {
		struct ieee80211_hdr frame;
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		struct iwl_tx_beacon_cmd beacon;
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		u8 raw[IEEE80211_FRAME_LEN];
		u8 cmd[360];
	} u;
	struct list_head list;
};

#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)

enum {
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	CMD_SYNC = 0,
	CMD_SIZE_NORMAL = 0,
	CMD_NO_SKB = 0,
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	CMD_SIZE_HUGE = (1 << 0),
	CMD_ASYNC = (1 << 1),
	CMD_WANT_SKB = (1 << 2),
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	CMD_MAPPED = (1 << 3),
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};

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#define DEF_CMD_PAYLOAD_SIZE 320
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/**
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 * struct iwl_device_cmd
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 *
 * For allocation of the command and tx queues, this establishes the overall
 * size of the largest command we send to uCode, except for a scan command
 * (which is relatively huge; space is allocated separately).
 */
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struct iwl_device_cmd {
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	struct iwl_cmd_header hdr;	/* uCode API */
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	union {
		u32 flags;
		u8 val8;
		u16 val16;
		u32 val32;
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		struct iwl_tx_cmd tx;
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		struct iwl6000_channel_switch_cmd chswitch;
		u8 payload[DEF_CMD_PAYLOAD_SIZE];
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	} __packed cmd;
} __packed;
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#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))

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struct iwl_host_cmd {
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	const void *data;
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	unsigned long reply_page;
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	void (*callback)(struct iwl_priv *priv,
			 struct iwl_device_cmd *cmd,
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			 struct iwl_rx_packet *pkt);
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	u32 flags;
	u16 len;
	u8 id;
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};

#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
#define SUP_RATE_11G_MAX_NUM_CHANNELS  12

/**
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 * struct iwl_rx_queue - Rx queue
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 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
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 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
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 * @read: Shared index to newest available Rx buffer
 * @write: Shared index to oldest written Rx packet
 * @free_count: Number of pre-allocated buffers in rx_free
 * @rx_free: list of free SKBs for use
 * @rx_used: List of Rx buffers with no SKB
 * @need_update: flag to indicate we need to update read/write index
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 * @rb_stts: driver's pointer to receive buffer status
 * @rb_stts_dma: bus address of receive buffer status
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 *
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 * NOTE:  rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
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 */
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struct iwl_rx_queue {
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	__le32 *bd;
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	dma_addr_t bd_dma;
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	struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
	struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
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	u32 read;
	u32 write;
	u32 free_count;
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	u32 write_actual;
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	struct list_head rx_free;
	struct list_head rx_used;
	int need_update;
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	struct iwl_rb_status *rb_stts;
	dma_addr_t rb_stts_dma;
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	spinlock_t lock;
};

#define IWL_SUPPORTED_RATES_IE_LEN         8

#define MAX_TID_COUNT        9

#define IWL_INVALID_RATE     0xFF
#define IWL_INVALID_VALUE    -1

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/**
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 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
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 * @txq_id: Tx queue used for Tx attempt
 * @frame_count: # frames attempted by Tx command
 * @wait_for_ba: Expect block-ack before next Tx reply
 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
 * @rate_n_flags: Rate at which Tx was attempted
 *
 * If REPLY_TX indicates that aggregation was attempted, driver must wait
 * for block ack (REPLY_COMPRESSED_BA).  This struct stores tx reply info
 * until block ack arrives.
 */
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struct iwl_ht_agg {
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	u16 txq_id;
	u16 frame_count;
	u16 wait_for_ba;
	u16 start_idx;
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	u64 bitmap;
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	u32 rate_n_flags;
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#define IWL_AGG_OFF 0
#define IWL_AGG_ON 1
#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
#define IWL_EMPTYING_HW_QUEUE_DELBA 3
	u8 state;
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	u8 tx_fifo;
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};
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struct iwl_tid_data {
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	u16 seq_number; /* agn only */
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	u16 tfds_in_queue;
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	struct iwl_ht_agg agg;
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};

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struct iwl_hw_key {
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	u32 cipher;
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	int keylen;
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	u8 keyidx;
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	u8 key[32];
};

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union iwl_ht_rate_supp {
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	u16 rates;
	struct {
		u8 siso_rate;
		u8 mimo_rate;
	};
};

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#define CFG_HT_RX_AMPDU_FACTOR_8K   (0x0)
#define CFG_HT_RX_AMPDU_FACTOR_16K  (0x1)
#define CFG_HT_RX_AMPDU_FACTOR_32K  (0x2)
#define CFG_HT_RX_AMPDU_FACTOR_64K  (0x3)
#define CFG_HT_RX_AMPDU_FACTOR_DEF  CFG_HT_RX_AMPDU_FACTOR_64K
#define CFG_HT_RX_AMPDU_FACTOR_MAX  CFG_HT_RX_AMPDU_FACTOR_64K
#define CFG_HT_RX_AMPDU_FACTOR_MIN  CFG_HT_RX_AMPDU_FACTOR_8K
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/*
 * Maximal MPDU density for TX aggregation
 * 4 - 2us density
 * 5 - 4us density
 * 6 - 8us density
 * 7 - 16us density
 */
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#define CFG_HT_MPDU_DENSITY_2USEC   (0x4)
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#define CFG_HT_MPDU_DENSITY_4USEC   (0x5)
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#define CFG_HT_MPDU_DENSITY_8USEC   (0x6)
#define CFG_HT_MPDU_DENSITY_16USEC  (0x7)
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#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
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#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
#define CFG_HT_MPDU_DENSITY_MIN     (0x1)
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struct iwl_ht_config {
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	bool single_chain_sufficient;
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	enum ieee80211_smps_mode smps; /* current smps mode */
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};

/* QoS structures */
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struct iwl_qos_info {
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	int qos_active;
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	struct iwl_qosparam_cmd def_qos_parm;
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};

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/*
 * Structure should be accessed with sta_lock held. When station addition
 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
 * held.
 */
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struct iwl_station_entry {
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	struct iwl_addsta_cmd sta;
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	struct iwl_tid_data tid[MAX_TID_COUNT];
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	u8 used, ctxid;
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	struct iwl_hw_key keyinfo;
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	struct iwl_link_quality_cmd *lq;
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};

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struct iwl_station_priv_common {
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	struct iwl_rxon_context *ctx;
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	u8 sta_id;
};

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/*
 * iwl_station_priv: Driver's private station information
 *
 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
 * in the structure for use by driver. This structure is places in that
 * space.
 */
struct iwl_station_priv {
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	struct iwl_station_priv_common common;
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	struct iwl_lq_sta lq_sta;
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	atomic_t pending_frames;
	bool client;
	bool asleep;
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	u8 max_agg_bufsize;
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};

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/**
 * struct iwl_vif_priv - driver's private per-interface information
 *
 * When mac80211 allocates a virtual interface, it can allocate
 * space for us to put data into.
 */
struct iwl_vif_priv {
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	struct iwl_rxon_context *ctx;
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	u8 ibss_bssid_sta_id;
};

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/* one for each uCode image (inst/data, boot/init/runtime) */
struct fw_desc {
	void *v_addr;		/* access by driver */
	dma_addr_t p_addr;	/* access by card's busmaster DMA */
	u32 len;		/* bytes */
};

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struct fw_img {
	struct fw_desc code, data;
};

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/* v1/v2 uCode file layout */
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struct iwl_ucode_header {
	__le32 ver;	/* major/minor/API/serial */
	union {
		struct {
			__le32 inst_size;	/* bytes of runtime code */
			__le32 data_size;	/* bytes of runtime data */
			__le32 init_size;	/* bytes of init code */
			__le32 init_data_size;	/* bytes of init data */
			__le32 boot_size;	/* bytes of bootstrap code */
			u8 data[0];		/* in same order as sizes */
		} v1;
		struct {
			__le32 build;		/* build number */
			__le32 inst_size;	/* bytes of runtime code */
			__le32 data_size;	/* bytes of runtime data */
			__le32 init_size;	/* bytes of init code */
			__le32 init_data_size;	/* bytes of init data */
			__le32 boot_size;	/* bytes of bootstrap code */
			u8 data[0];		/* in same order as sizes */
		} v2;
	} u;
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};

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/*
 * new TLV uCode file layout
 *
 * The new TLV file format contains TLVs, that each specify
 * some piece of data. To facilitate "groups", for example
 * different instruction image with different capabilities,
 * bundled with the same init image, an alternative mechanism
 * is provided:
 * When the alternative field is 0, that means that the item
 * is always valid. When it is non-zero, then it is only
 * valid in conjunction with items of the same alternative,
 * in which case the driver (user) selects one alternative
 * to use.
 */

enum iwl_ucode_tlv_type {
	IWL_UCODE_TLV_INVALID		= 0, /* unused */
	IWL_UCODE_TLV_INST		= 1,
	IWL_UCODE_TLV_DATA		= 2,
	IWL_UCODE_TLV_INIT		= 3,
	IWL_UCODE_TLV_INIT_DATA		= 4,
	IWL_UCODE_TLV_BOOT		= 5,
	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
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	IWL_UCODE_TLV_PAN		= 7,
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	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
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	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
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	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
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	/* 16 and 17 reserved for future use */
	IWL_UCODE_TLV_FLAGS		= 18,
};

/**
 * enum iwl_ucode_tlv_flag - ucode API flags
 * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
 *	was a separate TLV but moved here to save space.
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 * @IWL_UCODE_TLV_FLAGS_RESERVED_1: reserved
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 * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
 */
enum iwl_ucode_tlv_flag {
	IWL_UCODE_TLV_FLAGS_PAN		= BIT(0),
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	IWL_UCODE_TLV_FLAGS_RESERVED_1	= BIT(1),
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	IWL_UCODE_TLV_FLAGS_MFP		= BIT(2),
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};

struct iwl_ucode_tlv {
	__le16 type;		/* see above */
	__le16 alternative;	/* see comment */
	__le32 length;		/* not including type/length fields */
	u8 data[0];
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} __packed;
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#define IWL_TLV_UCODE_MAGIC	0x0a4c5749

struct iwl_tlv_ucode_header {
	/*
	 * The TLV style ucode header is distinguished from
	 * the v1/v2 style header by first four bytes being
	 * zero, as such is an invalid combination of
	 * major/minor/API/serial versions.
	 */
	__le32 zero;
	__le32 magic;
	u8 human_readable[64];
	__le32 ver;		/* major/minor/API/serial */
	__le32 build;
	__le64 alternatives;	/* bitmask of valid alternatives */
	/*
	 * The data contained herein has a TLV layout,
	 * see above for the TLV header and types.
	 * Note that each TLV is padded to a length
	 * that is a multiple of 4 for alignment.
	 */
	u8 data[0];
};

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struct iwl_sensitivity_ranges {
	u16 min_nrg_cck;
	u16 max_nrg_cck;

	u16 nrg_th_cck;
	u16 nrg_th_ofdm;

	u16 auto_corr_min_ofdm;
	u16 auto_corr_min_ofdm_mrc;
	u16 auto_corr_min_ofdm_x1;
	u16 auto_corr_min_ofdm_mrc_x1;

	u16 auto_corr_max_ofdm;
	u16 auto_corr_max_ofdm_mrc;
	u16 auto_corr_max_ofdm_x1;
	u16 auto_corr_max_ofdm_mrc_x1;

	u16 auto_corr_max_cck;
	u16 auto_corr_max_cck_mrc;
	u16 auto_corr_min_cck;
	u16 auto_corr_min_cck_mrc;
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	u16 barker_corr_th_min;
	u16 barker_corr_th_min_mrc;
	u16 nrg_th_cca;
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};

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#define KELVIN_TO_CELSIUS(x) ((x)-273)
#define CELSIUS_TO_KELVIN(x) ((x)+273)


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/**
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 * struct iwl_hw_params
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 * @max_txq_num: Max # Tx queues supported
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 * @dma_chnl_num: Number of Tx DMA/FIFO channels
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 * @scd_bc_tbls_size: size of scheduler byte count tables
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 * @tfd_size: TFD size
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 * @tx/rx_chains_num: Number of TX/RX chains
 * @valid_tx/rx_ant: usable antennas
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 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
 * @max_rxq_log: Log-base-2 of max_rxq_size
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 * @rx_page_order: Rx buffer page order
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 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
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 * @max_stations:
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 * @ht40_channel: is 40MHz width possible in band 2.4
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 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
 * @sw_crypto: 0 for hw, 1 for sw
 * @max_xxx_size: for ucode uses
 * @ct_kill_threshold: temperature threshold
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 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
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 * @calib_init_cfg: setup initial calibrations for the hw
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 * @calib_rt_cfg: setup runtime calibrations for the hw
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 * @struct iwl_sensitivity_ranges: range of sensitivity values
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 */
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struct iwl_hw_params {
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	u8 max_txq_num;
	u8 dma_chnl_num;
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	u16 scd_bc_tbls_size;
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	u32 tfd_size;
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	u8  tx_chains_num;
	u8  rx_chains_num;
	u8  valid_tx_ant;
	u8  valid_rx_ant;
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	u16 max_rxq_size;
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	u16 max_rxq_log;
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	u32 rx_page_order;
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	u32 rx_wrt_ptr_reg;
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	u8  max_stations;
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	u8  ht40_channel;
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	u8  max_beacon_itrvl;	/* in 1024 ms */
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	u32 max_inst_size;
	u32 max_data_size;
	u32 ct_kill_threshold; /* value in hw-dependent units */
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	u32 ct_kill_exit_threshold; /* value in hw-dependent units */
				    /* for 1000, 6000 series and up */
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	u16 beacon_time_tsf_bits;
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	u32 calib_init_cfg;
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	u32 calib_rt_cfg;
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	const struct iwl_sensitivity_ranges *sens;
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};


/******************************************************************************
 *
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 * Functions implemented in core module which are forward declared here
 * for use by iwl-[4-5].c
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 *
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 * NOTE:  The implementation of these functions are not hardware specific
 * which is why they are in the core module files.
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 *
 * Naming convention --
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 * iwl_         <-- Is part of iwlwifi
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 * iwlXXXX_     <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
 *
 ****************************************************************************/
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extern void iwl_update_chain_flags(struct iwl_priv *priv);
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extern const u8 iwl_bcast_addr[ETH_ALEN];
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extern int iwl_rxq_stop(struct iwl_priv *priv);
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extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
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extern int iwl_queue_space(const struct iwl_queue *q);
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static inline int iwl_queue_used(const struct iwl_queue *q, int i)
{
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	return q->write_ptr >= q->read_ptr ?
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		(i >= q->read_ptr && i < q->write_ptr) :
		!(i < q->read_ptr && i >= q->write_ptr);
}


static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
{
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	/*
	 * This is for init calibration result and scan command which
	 * required buffer > TFD_MAX_PAYLOAD_SIZE,
	 * the big buffer at end of command array
	 */
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	if (is_huge)
		return q->n_window;	/* must be power of 2 */

	/* Otherwise, use normal size buffers */
	return index & (q->n_window - 1);
}


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struct iwl_dma_ptr {
	dma_addr_t dma;
	void *addr;
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	size_t size;
};

#define IWL_OPERATION_MODE_AUTO     0
#define IWL_OPERATION_MODE_HT_ONLY  1
#define IWL_OPERATION_MODE_MIXED    2
#define IWL_OPERATION_MODE_20MHZ    3

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#define IWL_TX_CRC_SIZE 4
#define IWL_TX_DELIMITER_SIZE 4
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#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000

/* Sensitivity and chain noise calibration */
#define INITIALIZATION_VALUE		0xFFFF
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#define IWL_CAL_NUM_BEACONS		16
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#define MAXIMUM_ALLOWED_PATHLOSS	15

#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3

#define MAX_FA_OFDM  50
#define MIN_FA_OFDM  5
#define MAX_FA_CCK   50
#define MIN_FA_CCK   5

#define AUTO_CORR_STEP_OFDM       1

#define AUTO_CORR_STEP_CCK     3
#define AUTO_CORR_MAX_TH_CCK   160

#define NRG_DIFF               2
#define NRG_STEP_CCK           2
#define NRG_MARGIN             8
#define MAX_NUMBER_CCK_NO_FA 100

#define AUTO_CORR_CCK_MIN_VAL_DEF    (125)

#define CHAIN_A             0
#define CHAIN_B             1
#define CHAIN_C             2
#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
#define ALL_BAND_FILTER			0xFF00
#define IN_BAND_FILTER			0xFF
#define MIN_AVERAGE_NOISE_MAX_VALUE	0xFFFFFFFF

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#define NRG_NUM_PREV_STAT_L     20
#define NUM_RX_CHAINS           3

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enum iwlagn_false_alarm_state {
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	IWL_FA_TOO_MANY = 0,
	IWL_FA_TOO_FEW = 1,
	IWL_FA_GOOD_RANGE = 2,
};

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enum iwlagn_chain_noise_state {
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	IWL_CHAIN_NOISE_ALIVE = 0,  /* must be 0 */
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	IWL_CHAIN_NOISE_ACCUMULATE,
	IWL_CHAIN_NOISE_CALIBRATED,
	IWL_CHAIN_NOISE_DONE,
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};

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/*
 * enum iwl_calib
 * defines the order in which results of initial calibrations
 * should be sent to the runtime uCode
 */
enum iwl_calib {
	IWL_CALIB_XTAL,
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	IWL_CALIB_DC,
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	IWL_CALIB_LO,
	IWL_CALIB_TX_IQ,
	IWL_CALIB_TX_IQ_PERD,
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	IWL_CALIB_BASE_BAND,
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	IWL_CALIB_TEMP_OFFSET,
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	IWL_CALIB_MAX
};

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/* Opaque calibration results */
struct iwl_calib_result {
	void *buf;
	size_t buf_len;
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};

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/* Sensitivity calib data */
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struct iwl_sensitivity_data {
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	u32 auto_corr_ofdm;
	u32 auto_corr_ofdm_mrc;
	u32 auto_corr_ofdm_x1;
	u32 auto_corr_ofdm_mrc_x1;
	u32 auto_corr_cck;
	u32 auto_corr_cck_mrc;

	u32 last_bad_plcp_cnt_ofdm;
	u32 last_fa_cnt_ofdm;
	u32 last_bad_plcp_cnt_cck;
	u32 last_fa_cnt_cck;

	u32 nrg_curr_state;
	u32 nrg_prev_state;
	u32 nrg_value[10];
	u8  nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
	u32 nrg_silence_ref;
	u32 nrg_energy_idx;
	u32 nrg_silence_idx;
	u32 nrg_th_cck;
	s32 nrg_auto_corr_silence_diff;
	u32 num_in_cck_no_fa;
	u32 nrg_th_ofdm;
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	u16 barker_corr_th_min;
	u16 barker_corr_th_min_mrc;
	u16 nrg_th_cca;
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};

/* Chain noise (differential Rx gain) calib data */
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struct iwl_chain_noise_data {
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	u32 active_chains;
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	u32 chain_noise_a;
	u32 chain_noise_b;
	u32 chain_noise_c;
	u32 chain_signal_a;
	u32 chain_signal_b;
	u32 chain_signal_c;
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	u16 beacon_count;
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	u8 disconn_array[NUM_RX_CHAINS];
	u8 delta_gain_code[NUM_RX_CHAINS];
	u8 radio_write;
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	u8 state;
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};

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#define	EEPROM_SEM_TIMEOUT 10		/* milliseconds */
#define EEPROM_SEM_RETRY_LIMIT 1000	/* number of attempts (not time) */
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#define IWL_TRAFFIC_ENTRIES	(256)
#define IWL_TRAFFIC_ENTRY_SIZE  (64)
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enum {
	MEASUREMENT_READY = (1 << 0),
	MEASUREMENT_ACTIVE = (1 << 1),
};

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enum iwl_nvm_type {
	NVM_DEVICE_TYPE_EEPROM = 0,
	NVM_DEVICE_TYPE_OTP,
};

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/*
 * Two types of OTP memory access modes
 *   IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
 * 			        based on physical memory addressing
 *   IWL_OTP_ACCESS_RELATIVE - relative address mode,
 * 			       based on logical memory addressing
 */
enum iwl_access_mode {
	IWL_OTP_ACCESS_ABSOLUTE,
	IWL_OTP_ACCESS_RELATIVE,
};
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/**
 * enum iwl_pa_type - Power Amplifier type
 * @IWL_PA_SYSTEM:  based on uCode configuration
 * @IWL_PA_INTERNAL: use Internal only
 */
enum iwl_pa_type {
	IWL_PA_SYSTEM = 0,
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	IWL_PA_INTERNAL = 1,
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};

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/* interrupt statistics */
struct isr_statistics {
	u32 hw;
	u32 sw;
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	u32 err_code;
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	u32 sch;
	u32 alive;
	u32 rfkill;
	u32 ctkill;
	u32 wakeup;
	u32 rx;
	u32 rx_handlers[REPLY_MAX];
	u32 tx;
	u32 unhandled;
};
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/* reply_tx_statistics (for _agn devices) */
struct reply_tx_error_statistics {
	u32 pp_delay;
	u32 pp_few_bytes;
	u32 pp_bt_prio;
	u32 pp_quiet_period;
	u32 pp_calc_ttak;
	u32 int_crossed_retry;
	u32 short_limit;
	u32 long_limit;
	u32 fifo_underrun;
	u32 drain_flow;
	u32 rfkill_flush;
	u32 life_expire;
	u32 dest_ps;
	u32 host_abort;
	u32 bt_retry;
	u32 sta_invalid;
	u32 frag_drop;
	u32 tid_disable;
	u32 fifo_flush;
	u32 insuff_cf_poll;
	u32 fail_hw_drop;
	u32 sta_color_mismatch;
	u32 unknown;
};

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/* reply_agg_tx_statistics (for _agn devices) */
struct reply_agg_tx_error_statistics {
	u32 underrun;
	u32 bt_prio;
	u32 few_bytes;
	u32 abort;
	u32 last_sent_ttl;
	u32 last_sent_try;
	u32 last_sent_bt_kill;
	u32 scd_query;
	u32 bad_crc32;
	u32 response;
	u32 dump_tx;
	u32 delay_tx;
	u32 unknown;
};

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/* management statistics */
enum iwl_mgmt_stats {
	MANAGEMENT_ASSOC_REQ = 0,
	MANAGEMENT_ASSOC_RESP,
	MANAGEMENT_REASSOC_REQ,
	MANAGEMENT_REASSOC_RESP,
	MANAGEMENT_PROBE_REQ,
	MANAGEMENT_PROBE_RESP,
	MANAGEMENT_BEACON,
	MANAGEMENT_ATIM,
	MANAGEMENT_DISASSOC,
	MANAGEMENT_AUTH,
	MANAGEMENT_DEAUTH,
	MANAGEMENT_ACTION,
	MANAGEMENT_MAX,
};
/* control statistics */
enum iwl_ctrl_stats {
	CONTROL_BACK_REQ =  0,
	CONTROL_BACK,
	CONTROL_PSPOLL,
	CONTROL_RTS,
	CONTROL_CTS,
	CONTROL_ACK,
	CONTROL_CFEND,
	CONTROL_CFENDACK,
	CONTROL_MAX,
};

struct traffic_stats {
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	u32 mgmt[MANAGEMENT_MAX];
	u32 ctrl[CONTROL_MAX];
	u32 data_cnt;
	u64 data_bytes;
#endif
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};
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/*
 * iwl_switch_rxon: "channel switch" structure
 *
 * @ switch_in_progress: channel switch in progress
 * @ channel: new channel
 */
struct iwl_switch_rxon {
	bool switch_in_progress;
	__le16 channel;
};

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/*
 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
 * to perform continuous uCode event logging operation if enabled
 */
#define UCODE_TRACE_PERIOD (100)

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