dma.c 7.38 KB
Newer Older
1
2
3
4
5
/* linux/arch/arm/mach-exynos4/dma.c
 *
 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
 *	Jaswinder Singh <jassi.brar@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/dma-mapping.h>
25
26
#include <linux/amba/bus.h>
#include <linux/amba/pl330.h>
27
#include <linux/of.h>
28

29
#include <asm/irq.h>
30
31
#include <plat/devs.h>
#include <plat/irqs.h>
32
#include <plat/cpu.h>
33
34
35

#include <mach/map.h>
#include <mach/irqs.h>
36
#include <mach/dma.h>
37

38
static u8 exynos4210_pdma0_peri[] = {
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM2_RX,
	DMACH_PCM2_TX,
	DMACH_MSM_REQ0,
	DMACH_MSM_REQ2,
	DMACH_SPI0_RX,
	DMACH_SPI0_TX,
	DMACH_SPI2_RX,
	DMACH_SPI2_TX,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S2_RX,
	DMACH_I2S2_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART2_RX,
	DMACH_UART2_TX,
	DMACH_UART4_RX,
	DMACH_UART4_TX,
	DMACH_SLIMBUS0_RX,
	DMACH_SLIMBUS0_TX,
	DMACH_SLIMBUS2_RX,
	DMACH_SLIMBUS2_TX,
	DMACH_SLIMBUS4_RX,
	DMACH_SLIMBUS4_TX,
	DMACH_AC97_MICIN,
	DMACH_AC97_PCMIN,
	DMACH_AC97_PCMOUT,
69
70
};

71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
static u8 exynos4212_pdma0_peri[] = {
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM2_RX,
	DMACH_PCM2_TX,
	DMACH_MIPI_HSI0,
	DMACH_MIPI_HSI1,
	DMACH_SPI0_RX,
	DMACH_SPI0_TX,
	DMACH_SPI2_RX,
	DMACH_SPI2_TX,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S2_RX,
	DMACH_I2S2_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART2_RX,
	DMACH_UART2_TX,
	DMACH_UART4_RX,
	DMACH_UART4_TX,
	DMACH_SLIMBUS0_RX,
	DMACH_SLIMBUS0_TX,
	DMACH_SLIMBUS2_RX,
	DMACH_SLIMBUS2_TX,
	DMACH_SLIMBUS4_RX,
	DMACH_SLIMBUS4_TX,
	DMACH_AC97_MICIN,
	DMACH_AC97_PCMIN,
	DMACH_AC97_PCMOUT,
	DMACH_MIPI_HSI4,
	DMACH_MIPI_HSI5,
104
105
};

106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
static u8 exynos5250_pdma0_peri[] = {
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM2_RX,
	DMACH_PCM2_TX,
	DMACH_SPI0_RX,
	DMACH_SPI0_TX,
	DMACH_SPI2_RX,
	DMACH_SPI2_TX,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S2_RX,
	DMACH_I2S2_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART2_RX,
	DMACH_UART2_TX,
	DMACH_UART4_RX,
	DMACH_UART4_TX,
	DMACH_SLIMBUS0_RX,
	DMACH_SLIMBUS0_TX,
	DMACH_SLIMBUS2_RX,
	DMACH_SLIMBUS2_TX,
	DMACH_SLIMBUS4_RX,
	DMACH_SLIMBUS4_TX,
	DMACH_AC97_MICIN,
	DMACH_AC97_PCMIN,
	DMACH_AC97_PCMOUT,
	DMACH_MIPI_HSI0,
	DMACH_MIPI_HSI2,
	DMACH_MIPI_HSI4,
	DMACH_MIPI_HSI6,
};

static struct dma_pl330_platdata exynos_pdma0_pdata;
142

143
144
static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330,
	EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos_pdma0_pdata);
145

146
static u8 exynos4210_pdma1_peri[] = {
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM1_RX,
	DMACH_PCM1_TX,
	DMACH_MSM_REQ1,
	DMACH_MSM_REQ3,
	DMACH_SPI1_RX,
	DMACH_SPI1_TX,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S1_RX,
	DMACH_I2S1_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART1_RX,
	DMACH_UART1_TX,
	DMACH_UART3_RX,
	DMACH_UART3_TX,
	DMACH_SLIMBUS1_RX,
	DMACH_SLIMBUS1_TX,
	DMACH_SLIMBUS3_RX,
	DMACH_SLIMBUS3_TX,
	DMACH_SLIMBUS5_RX,
	DMACH_SLIMBUS5_TX,
172
173
};

174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
static u8 exynos4212_pdma1_peri[] = {
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM1_RX,
	DMACH_PCM1_TX,
	DMACH_MIPI_HSI2,
	DMACH_MIPI_HSI3,
	DMACH_SPI1_RX,
	DMACH_SPI1_TX,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S1_RX,
	DMACH_I2S1_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART1_RX,
	DMACH_UART1_TX,
	DMACH_UART3_RX,
	DMACH_UART3_TX,
	DMACH_SLIMBUS1_RX,
	DMACH_SLIMBUS1_TX,
	DMACH_SLIMBUS3_RX,
	DMACH_SLIMBUS3_TX,
	DMACH_SLIMBUS5_RX,
	DMACH_SLIMBUS5_TX,
	DMACH_SLIMBUS0AUX_RX,
	DMACH_SLIMBUS0AUX_TX,
	DMACH_SPDIF,
	DMACH_MIPI_HSI6,
	DMACH_MIPI_HSI7,
205
206
};

207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
static u8 exynos5250_pdma1_peri[] = {
	DMACH_PCM0_RX,
	DMACH_PCM0_TX,
	DMACH_PCM1_RX,
	DMACH_PCM1_TX,
	DMACH_SPI1_RX,
	DMACH_SPI1_TX,
	DMACH_PWM,
	DMACH_SPDIF,
	DMACH_I2S0S_TX,
	DMACH_I2S0_RX,
	DMACH_I2S0_TX,
	DMACH_I2S1_RX,
	DMACH_I2S1_TX,
	DMACH_UART0_RX,
	DMACH_UART0_TX,
	DMACH_UART1_RX,
	DMACH_UART1_TX,
	DMACH_UART3_RX,
	DMACH_UART3_TX,
	DMACH_SLIMBUS1_RX,
	DMACH_SLIMBUS1_TX,
	DMACH_SLIMBUS3_RX,
	DMACH_SLIMBUS3_TX,
	DMACH_SLIMBUS5_RX,
	DMACH_SLIMBUS5_TX,
	DMACH_SLIMBUS0AUX_RX,
	DMACH_SLIMBUS0AUX_TX,
	DMACH_DISP1,
	DMACH_MIPI_HSI1,
	DMACH_MIPI_HSI3,
	DMACH_MIPI_HSI5,
	DMACH_MIPI_HSI7,
};
241

242
243
244
245
static struct dma_pl330_platdata exynos_pdma1_pdata;

static AMBA_AHB_DEVICE(exynos_pdma1,  "dma-pl330.1", 0x00041330,
	EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos_pdma1_pdata);
246

Boojin Kim's avatar
Boojin Kim committed
247
248
249
250
251
252
253
254
255
256
257
static u8 mdma_peri[] = {
	DMACH_MTOM_0,
	DMACH_MTOM_1,
	DMACH_MTOM_2,
	DMACH_MTOM_3,
	DMACH_MTOM_4,
	DMACH_MTOM_5,
	DMACH_MTOM_6,
	DMACH_MTOM_7,
};

258
static struct dma_pl330_platdata exynos_mdma1_pdata = {
Boojin Kim's avatar
Boojin Kim committed
259
260
261
262
	.nr_valid_peri = ARRAY_SIZE(mdma_peri),
	.peri_id = mdma_peri,
};

263
264
static AMBA_AHB_DEVICE(exynos_mdma1,  "dma-pl330.2", 0x00041330,
	EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos_mdma1_pdata);
Boojin Kim's avatar
Boojin Kim committed
265

266
static int __init exynos_dma_init(void)
267
{
268
269
270
	if (of_have_populated_dt())
		return 0;

271
	if (soc_is_exynos4210()) {
272
		exynos_pdma0_pdata.nr_valid_peri =
273
			ARRAY_SIZE(exynos4210_pdma0_peri);
274
275
		exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
		exynos_pdma1_pdata.nr_valid_peri =
276
			ARRAY_SIZE(exynos4210_pdma1_peri);
277
		exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
278
279
280

		if (samsung_rev() == EXYNOS4210_REV_0)
			exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
281
	} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
282
		exynos_pdma0_pdata.nr_valid_peri =
283
			ARRAY_SIZE(exynos4212_pdma0_peri);
284
285
		exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
		exynos_pdma1_pdata.nr_valid_peri =
286
			ARRAY_SIZE(exynos4212_pdma1_peri);
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
		exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
	} else if (soc_is_exynos5250()) {
		exynos_pdma0_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos5250_pdma0_peri);
		exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri;
		exynos_pdma1_pdata.nr_valid_peri =
			ARRAY_SIZE(exynos5250_pdma1_peri);
		exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri;

		exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0;
		exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K;
		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0;
		exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1;
		exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K;
		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1;
		exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1;
		exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K;
		exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1;
305
306
	}

307
308
	dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask);
	dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask);
309
	dma_cap_set(DMA_PRIVATE, exynos_pdma0_pdata.cap_mask);
310
	amba_device_register(&exynos_pdma0_device, &iomem_resource);
311

312
313
	dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask);
	dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask);
314
	dma_cap_set(DMA_PRIVATE, exynos_pdma1_pdata.cap_mask);
315
	amba_device_register(&exynos_pdma1_device, &iomem_resource);
316

317
318
	dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);
	amba_device_register(&exynos_mdma1_device, &iomem_resource);
Boojin Kim's avatar
Boojin Kim committed
319

320
321
	return 0;
}
322
arch_initcall(exynos_dma_init);