at86rf230.c 28.8 KB
Newer Older
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
/*
 * AT86RF230/RF231 driver
 *
 * Copyright (C) 2009-2012 Siemens AG
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * Written by:
 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
26
#include <linux/irq.h>
27
28
29
30
31
32
33
34
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/workqueue.h>
#include <linux/spinlock.h>
#include <linux/spi/spi.h>
#include <linux/spi/at86rf230.h>
#include <linux/skbuff.h>
35
#include <linux/of_gpio.h>
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

#include <net/mac802154.h>
#include <net/wpan-phy.h>

struct at86rf230_local {
	struct spi_device *spi;

	u8 part;
	u8 vers;

	u8 buf[2];
	struct mutex bmux;

	struct work_struct irqwork;
	struct completion tx_complete;

	struct ieee802154_dev *dev;

	spinlock_t lock;
55
	bool irq_busy;
56
	bool is_tx;
57
	bool tx_aret;
58
59

	int rssi_base_val;
60
61
};

62
static bool is_rf212(struct at86rf230_local *local)
63
64
65
66
{
	return local->part == 7;
}

67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
#define	RG_TRX_STATUS	(0x01)
#define	SR_TRX_STATUS		0x01, 0x1f, 0
#define	SR_RESERVED_01_3	0x01, 0x20, 5
#define	SR_CCA_STATUS		0x01, 0x40, 6
#define	SR_CCA_DONE		0x01, 0x80, 7
#define	RG_TRX_STATE	(0x02)
#define	SR_TRX_CMD		0x02, 0x1f, 0
#define	SR_TRAC_STATUS		0x02, 0xe0, 5
#define	RG_TRX_CTRL_0	(0x03)
#define	SR_CLKM_CTRL		0x03, 0x07, 0
#define	SR_CLKM_SHA_SEL		0x03, 0x08, 3
#define	SR_PAD_IO_CLKM		0x03, 0x30, 4
#define	SR_PAD_IO		0x03, 0xc0, 6
#define	RG_TRX_CTRL_1	(0x04)
#define	SR_IRQ_POLARITY		0x04, 0x01, 0
#define	SR_IRQ_MASK_MODE	0x04, 0x02, 1
#define	SR_SPI_CMD_MODE		0x04, 0x0c, 2
#define	SR_RX_BL_CTRL		0x04, 0x10, 4
#define	SR_TX_AUTO_CRC_ON	0x04, 0x20, 5
#define	SR_IRQ_2_EXT_EN		0x04, 0x40, 6
#define	SR_PA_EXT_EN		0x04, 0x80, 7
#define	RG_PHY_TX_PWR	(0x05)
#define	SR_TX_PWR		0x05, 0x0f, 0
#define	SR_PA_LT		0x05, 0x30, 4
#define	SR_PA_BUF_LT		0x05, 0xc0, 6
#define	RG_PHY_RSSI	(0x06)
#define	SR_RSSI			0x06, 0x1f, 0
#define	SR_RND_VALUE		0x06, 0x60, 5
#define	SR_RX_CRC_VALID		0x06, 0x80, 7
#define	RG_PHY_ED_LEVEL	(0x07)
#define	SR_ED_LEVEL		0x07, 0xff, 0
#define	RG_PHY_CC_CCA	(0x08)
#define	SR_CHANNEL		0x08, 0x1f, 0
#define	SR_CCA_MODE		0x08, 0x60, 5
#define	SR_CCA_REQUEST		0x08, 0x80, 7
#define	RG_CCA_THRES	(0x09)
#define	SR_CCA_ED_THRES		0x09, 0x0f, 0
#define	SR_RESERVED_09_1	0x09, 0xf0, 4
#define	RG_RX_CTRL	(0x0a)
#define	SR_PDT_THRES		0x0a, 0x0f, 0
#define	SR_RESERVED_0a_1	0x0a, 0xf0, 4
#define	RG_SFD_VALUE	(0x0b)
#define	SR_SFD_VALUE		0x0b, 0xff, 0
#define	RG_TRX_CTRL_2	(0x0c)
#define	SR_OQPSK_DATA_RATE	0x0c, 0x03, 0
112
113
#define	SR_SUB_MODE		0x0c, 0x04, 2
#define	SR_BPSK_QPSK		0x0c, 0x08, 3
114
115
#define	SR_OQPSK_SUB1_RC_EN	0x0c, 0x10, 4
#define	SR_RESERVED_0c_5	0x0c, 0x60, 5
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
#define	SR_RX_SAFE_MODE		0x0c, 0x80, 7
#define	RG_ANT_DIV	(0x0d)
#define	SR_ANT_CTRL		0x0d, 0x03, 0
#define	SR_ANT_EXT_SW_EN	0x0d, 0x04, 2
#define	SR_ANT_DIV_EN		0x0d, 0x08, 3
#define	SR_RESERVED_0d_2	0x0d, 0x70, 4
#define	SR_ANT_SEL		0x0d, 0x80, 7
#define	RG_IRQ_MASK	(0x0e)
#define	SR_IRQ_MASK		0x0e, 0xff, 0
#define	RG_IRQ_STATUS	(0x0f)
#define	SR_IRQ_0_PLL_LOCK	0x0f, 0x01, 0
#define	SR_IRQ_1_PLL_UNLOCK	0x0f, 0x02, 1
#define	SR_IRQ_2_RX_START	0x0f, 0x04, 2
#define	SR_IRQ_3_TRX_END	0x0f, 0x08, 3
#define	SR_IRQ_4_CCA_ED_DONE	0x0f, 0x10, 4
#define	SR_IRQ_5_AMI		0x0f, 0x20, 5
#define	SR_IRQ_6_TRX_UR		0x0f, 0x40, 6
#define	SR_IRQ_7_BAT_LOW	0x0f, 0x80, 7
#define	RG_VREG_CTRL	(0x10)
#define	SR_RESERVED_10_6	0x10, 0x03, 0
#define	SR_DVDD_OK		0x10, 0x04, 2
#define	SR_DVREG_EXT		0x10, 0x08, 3
#define	SR_RESERVED_10_3	0x10, 0x30, 4
#define	SR_AVDD_OK		0x10, 0x40, 6
#define	SR_AVREG_EXT		0x10, 0x80, 7
#define	RG_BATMON	(0x11)
#define	SR_BATMON_VTH		0x11, 0x0f, 0
#define	SR_BATMON_HR		0x11, 0x10, 4
#define	SR_BATMON_OK		0x11, 0x20, 5
#define	SR_RESERVED_11_1	0x11, 0xc0, 6
#define	RG_XOSC_CTRL	(0x12)
#define	SR_XTAL_TRIM		0x12, 0x0f, 0
#define	SR_XTAL_MODE		0x12, 0xf0, 4
#define	RG_RX_SYN	(0x15)
#define	SR_RX_PDT_LEVEL		0x15, 0x0f, 0
#define	SR_RESERVED_15_2	0x15, 0x70, 4
#define	SR_RX_PDT_DIS		0x15, 0x80, 7
#define	RG_XAH_CTRL_1	(0x17)
#define	SR_RESERVED_17_8	0x17, 0x01, 0
#define	SR_AACK_PROM_MODE	0x17, 0x02, 1
#define	SR_AACK_ACK_TIME	0x17, 0x04, 2
#define	SR_RESERVED_17_5	0x17, 0x08, 3
#define	SR_AACK_UPLD_RES_FT	0x17, 0x10, 4
#define	SR_AACK_FLTR_RES_FT	0x17, 0x20, 5
160
#define	SR_CSMA_LBT_MODE	0x17, 0x40, 6
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
#define	SR_RESERVED_17_1	0x17, 0x80, 7
#define	RG_FTN_CTRL	(0x18)
#define	SR_RESERVED_18_2	0x18, 0x7f, 0
#define	SR_FTN_START		0x18, 0x80, 7
#define	RG_PLL_CF	(0x1a)
#define	SR_RESERVED_1a_2	0x1a, 0x7f, 0
#define	SR_PLL_CF_START		0x1a, 0x80, 7
#define	RG_PLL_DCU	(0x1b)
#define	SR_RESERVED_1b_3	0x1b, 0x3f, 0
#define	SR_RESERVED_1b_2	0x1b, 0x40, 6
#define	SR_PLL_DCU_START	0x1b, 0x80, 7
#define	RG_PART_NUM	(0x1c)
#define	SR_PART_NUM		0x1c, 0xff, 0
#define	RG_VERSION_NUM	(0x1d)
#define	SR_VERSION_NUM		0x1d, 0xff, 0
#define	RG_MAN_ID_0	(0x1e)
#define	SR_MAN_ID_0		0x1e, 0xff, 0
#define	RG_MAN_ID_1	(0x1f)
#define	SR_MAN_ID_1		0x1f, 0xff, 0
#define	RG_SHORT_ADDR_0	(0x20)
#define	SR_SHORT_ADDR_0		0x20, 0xff, 0
#define	RG_SHORT_ADDR_1	(0x21)
#define	SR_SHORT_ADDR_1		0x21, 0xff, 0
#define	RG_PAN_ID_0	(0x22)
#define	SR_PAN_ID_0		0x22, 0xff, 0
#define	RG_PAN_ID_1	(0x23)
#define	SR_PAN_ID_1		0x23, 0xff, 0
#define	RG_IEEE_ADDR_0	(0x24)
#define	SR_IEEE_ADDR_0		0x24, 0xff, 0
#define	RG_IEEE_ADDR_1	(0x25)
#define	SR_IEEE_ADDR_1		0x25, 0xff, 0
#define	RG_IEEE_ADDR_2	(0x26)
#define	SR_IEEE_ADDR_2		0x26, 0xff, 0
#define	RG_IEEE_ADDR_3	(0x27)
#define	SR_IEEE_ADDR_3		0x27, 0xff, 0
#define	RG_IEEE_ADDR_4	(0x28)
#define	SR_IEEE_ADDR_4		0x28, 0xff, 0
#define	RG_IEEE_ADDR_5	(0x29)
#define	SR_IEEE_ADDR_5		0x29, 0xff, 0
#define	RG_IEEE_ADDR_6	(0x2a)
#define	SR_IEEE_ADDR_6		0x2a, 0xff, 0
#define	RG_IEEE_ADDR_7	(0x2b)
#define	SR_IEEE_ADDR_7		0x2b, 0xff, 0
#define	RG_XAH_CTRL_0	(0x2c)
#define	SR_SLOTTED_OPERATION	0x2c, 0x01, 0
#define	SR_MAX_CSMA_RETRIES	0x2c, 0x0e, 1
#define	SR_MAX_FRAME_RETRIES	0x2c, 0xf0, 4
#define	RG_CSMA_SEED_0	(0x2d)
#define	SR_CSMA_SEED_0		0x2d, 0xff, 0
#define	RG_CSMA_SEED_1	(0x2e)
#define	SR_CSMA_SEED_1		0x2e, 0x07, 0
#define	SR_AACK_I_AM_COORD	0x2e, 0x08, 3
#define	SR_AACK_DIS_ACK		0x2e, 0x10, 4
#define	SR_AACK_SET_PD		0x2e, 0x20, 5
#define	SR_AACK_FVN_MODE	0x2e, 0xc0, 6
#define	RG_CSMA_BE	(0x2f)
#define	SR_MIN_BE		0x2f, 0x0f, 0
#define	SR_MAX_BE		0x2f, 0xf0, 4

#define CMD_REG		0x80
#define CMD_REG_MASK	0x3f
#define CMD_WRITE	0x40
#define CMD_FB		0x20

#define IRQ_BAT_LOW	(1 << 7)
#define IRQ_TRX_UR	(1 << 6)
#define IRQ_AMI		(1 << 5)
#define IRQ_CCA_ED	(1 << 4)
#define IRQ_TRX_END	(1 << 3)
#define IRQ_RX_START	(1 << 2)
#define IRQ_PLL_UNL	(1 << 1)
#define IRQ_PLL_LOCK	(1 << 0)

234
235
236
#define IRQ_ACTIVE_HIGH	0
#define IRQ_ACTIVE_LOW	1

237
238
239
240
241
242
243
244
245
246
247
248
#define STATE_P_ON		0x00	/* BUSY */
#define STATE_BUSY_RX		0x01
#define STATE_BUSY_TX		0x02
#define STATE_FORCE_TRX_OFF	0x03
#define STATE_FORCE_TX_ON	0x04	/* IDLE */
/* 0x05 */				/* INVALID_PARAMETER */
#define STATE_RX_ON		0x06
/* 0x07 */				/* SUCCESS */
#define STATE_TRX_OFF		0x08
#define STATE_TX_ON		0x09
/* 0x0a - 0x0e */			/* 0x0a - UNSUPPORTED_ATTRIBUTE */
#define STATE_SLEEP		0x0F
249
#define STATE_PREP_DEEP_SLEEP	0x10
250
251
#define STATE_BUSY_RX_AACK	0x11
#define STATE_BUSY_TX_ARET	0x12
252
253
#define STATE_RX_AACK_ON	0x16
#define STATE_TX_ARET_ON	0x19
254
255
256
257
258
#define STATE_RX_ON_NOCLK	0x1C
#define STATE_RX_AACK_ON_NOCLK	0x1D
#define STATE_BUSY_RX_AACK_NOCLK 0x1E
#define STATE_TRANSITION_IN_PROGRESS 0x1F

259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
static int
__at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
		u8 *version)
{
	u8 data[4];
	u8 *buf = kmalloc(2, GFP_KERNEL);
	int status;
	struct spi_message msg;
	struct spi_transfer xfer = {
		.len	= 2,
		.tx_buf	= buf,
		.rx_buf	= buf,
	};
	u8 reg;

	if (!buf)
		return -ENOMEM;

	for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
		buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
		buf[1] = 0xff;
		dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
		spi_message_init(&msg);
		spi_message_add_tail(&xfer, &msg);

		status = spi_sync(spi, &msg);
		dev_vdbg(&spi->dev, "status = %d\n", status);
		if (msg.status)
			status = msg.status;

		dev_vdbg(&spi->dev, "status = %d\n", status);
		dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
		dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);

		if (status == 0)
			data[reg - RG_PART_NUM] = buf[1];
		else
			break;
	}

	if (status == 0) {
		*part = data[0];
		*version = data[1];
		*man_id = (data[3] << 8) | data[2];
	}

	kfree(buf);

	return status;
}

310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
static int
__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
{
	u8 *buf = lp->buf;
	int status;
	struct spi_message msg;
	struct spi_transfer xfer = {
		.len	= 2,
		.tx_buf	= buf,
	};

	buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
	buf[1] = data;
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
	spi_message_init(&msg);
	spi_message_add_tail(&xfer, &msg);

	status = spi_sync(lp->spi, &msg);
	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	if (msg.status)
		status = msg.status;

	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);

	return status;
}

static int
__at86rf230_read_subreg(struct at86rf230_local *lp,
			u8 addr, u8 mask, int shift, u8 *data)
{
	u8 *buf = lp->buf;
	int status;
	struct spi_message msg;
	struct spi_transfer xfer = {
		.len	= 2,
		.tx_buf	= buf,
		.rx_buf	= buf,
	};

	buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
	buf[1] = 0xff;
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	spi_message_init(&msg);
	spi_message_add_tail(&xfer, &msg);

	status = spi_sync(lp->spi, &msg);
	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	if (msg.status)
		status = msg.status;

	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);

	if (status == 0)
369
		*data = (buf[1] & mask) >> shift;
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555

	return status;
}

static int
at86rf230_read_subreg(struct at86rf230_local *lp,
		      u8 addr, u8 mask, int shift, u8 *data)
{
	int status;

	mutex_lock(&lp->bmux);
	status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
	mutex_unlock(&lp->bmux);

	return status;
}

static int
at86rf230_write_subreg(struct at86rf230_local *lp,
		       u8 addr, u8 mask, int shift, u8 data)
{
	int status;
	u8 val;

	mutex_lock(&lp->bmux);
	status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
	if (status)
		goto out;

	val &= ~mask;
	val |= (data << shift) & mask;

	status = __at86rf230_write(lp, addr, val);
out:
	mutex_unlock(&lp->bmux);

	return status;
}

static int
at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
{
	u8 *buf = lp->buf;
	int status;
	struct spi_message msg;
	struct spi_transfer xfer_head = {
		.len		= 2,
		.tx_buf		= buf,

	};
	struct spi_transfer xfer_buf = {
		.len		= len,
		.tx_buf		= data,
	};

	mutex_lock(&lp->bmux);
	buf[0] = CMD_WRITE | CMD_FB;
	buf[1] = len + 2; /* 2 bytes for CRC that isn't written */

	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);

	spi_message_init(&msg);
	spi_message_add_tail(&xfer_head, &msg);
	spi_message_add_tail(&xfer_buf, &msg);

	status = spi_sync(lp->spi, &msg);
	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	if (msg.status)
		status = msg.status;

	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);

	mutex_unlock(&lp->bmux);
	return status;
}

static int
at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
{
	u8 *buf = lp->buf;
	int status;
	struct spi_message msg;
	struct spi_transfer xfer_head = {
		.len		= 2,
		.tx_buf		= buf,
		.rx_buf		= buf,
	};
	struct spi_transfer xfer_head1 = {
		.len		= 2,
		.tx_buf		= buf,
		.rx_buf		= buf,
	};
	struct spi_transfer xfer_buf = {
		.len		= 0,
		.rx_buf		= data,
	};

	mutex_lock(&lp->bmux);

	buf[0] = CMD_FB;
	buf[1] = 0x00;

	spi_message_init(&msg);
	spi_message_add_tail(&xfer_head, &msg);

	status = spi_sync(lp->spi, &msg);
	dev_vdbg(&lp->spi->dev, "status = %d\n", status);

	xfer_buf.len = *(buf + 1) + 1;
	*len = buf[1];

	buf[0] = CMD_FB;
	buf[1] = 0x00;

	spi_message_init(&msg);
	spi_message_add_tail(&xfer_head1, &msg);
	spi_message_add_tail(&xfer_buf, &msg);

	status = spi_sync(lp->spi, &msg);

	if (msg.status)
		status = msg.status;

	dev_vdbg(&lp->spi->dev, "status = %d\n", status);
	dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
	dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);

	if (status) {
		if (lqi && (*len > lp->buf[1]))
			*lqi = data[lp->buf[1]];
	}
	mutex_unlock(&lp->bmux);

	return status;
}

static int
at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
{
	might_sleep();
	BUG_ON(!level);
	*level = 0xbe;
	return 0;
}

static int
at86rf230_state(struct ieee802154_dev *dev, int state)
{
	struct at86rf230_local *lp = dev->priv;
	int rc;
	u8 val;
	u8 desired_status;

	might_sleep();

	if (state == STATE_FORCE_TX_ON)
		desired_status = STATE_TX_ON;
	else if (state == STATE_FORCE_TRX_OFF)
		desired_status = STATE_TRX_OFF;
	else
		desired_status = state;

	do {
		rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
		if (rc)
			goto err;
	} while (val == STATE_TRANSITION_IN_PROGRESS);

	if (val == desired_status)
		return 0;

	/* state is equal to phy states */
	rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
	if (rc)
		goto err;

	do {
		rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
		if (rc)
			goto err;
	} while (val == STATE_TRANSITION_IN_PROGRESS);


556
557
558
	if (val == desired_status ||
	    (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
	    (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
		return 0;

	pr_err("unexpected state change: %d, asked for %d\n", val, state);
	return -EBUSY;

err:
	pr_err("error: %d\n", rc);
	return rc;
}

static int
at86rf230_start(struct ieee802154_dev *dev)
{
	struct at86rf230_local *lp = dev->priv;
	u8 rc;

	rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
	if (rc)
		return rc;

579
	rc = at86rf230_state(dev, STATE_TX_ON);
580
581
582
	if (rc)
		return rc;

583
	return at86rf230_state(dev, STATE_RX_AACK_ON);
584
585
586
587
588
589
590
591
}

static void
at86rf230_stop(struct ieee802154_dev *dev)
{
	at86rf230_state(dev, STATE_FORCE_TRX_OFF);
}

592
593
594
static int
at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
{
595
596
	lp->rssi_base_val = -91;

597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
}

static int
at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
{
	int rc;

	if (channel == 0)
		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
	else
		rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
	if (rc < 0)
		return rc;

612
	if (page == 0) {
613
		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
614
615
		lp->rssi_base_val = -100;
	} else {
616
		rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
617
618
		lp->rssi_base_val = -98;
	}
619
620
621
	if (rc < 0)
		return rc;

622
623
624
	return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
}

625
626
627
628
629
630
631
632
static int
at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
{
	struct at86rf230_local *lp = dev->priv;
	int rc;

	might_sleep();

633
634
	if (page < 0 || page > 31 ||
	    !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
635
636
637
638
		WARN_ON(1);
		return -EINVAL;
	}

639
640
641
642
643
644
645
	if (is_rf212(lp))
		rc = at86rf212_set_channel(lp, page, channel);
	else
		rc = at86rf230_set_channel(lp, page, channel);
	if (rc < 0)
		return rc;

646
647
	msleep(1); /* Wait for PLL */
	dev->phy->current_channel = channel;
648
	dev->phy->current_page = page;
649
650
651
652
653
654
655
656
657
658
659

	return 0;
}

static int
at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
{
	struct at86rf230_local *lp = dev->priv;
	int rc;
	unsigned long flags;

660
	spin_lock_irqsave(&lp->lock, flags);
661
	if  (lp->irq_busy) {
662
		spin_unlock_irqrestore(&lp->lock, flags);
663
664
		return -EBUSY;
	}
665
	spin_unlock_irqrestore(&lp->lock, flags);
666

667
668
669
670
671
672
673
674
	might_sleep();

	rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
	if (rc)
		goto err;

	spin_lock_irqsave(&lp->lock, flags);
	lp->is_tx = 1;
675
	reinit_completion(&lp->tx_complete);
676
677
678
679
680
681
	spin_unlock_irqrestore(&lp->lock, flags);

	rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
	if (rc)
		goto err_rx;

682
683
684
685
686
687
	if (lp->tx_aret) {
		rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
		if (rc)
			goto err_rx;
	}

688
689
690
691
692
693
694
695
	rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
	if (rc)
		goto err_rx;

	rc = wait_for_completion_interruptible(&lp->tx_complete);
	if (rc < 0)
		goto err_rx;

696
	return at86rf230_start(dev);
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
err_rx:
	at86rf230_start(dev);
err:
	pr_err("error: %d\n", rc);

	spin_lock_irqsave(&lp->lock, flags);
	lp->is_tx = 0;
	spin_unlock_irqrestore(&lp->lock, flags);

	return rc;
}

static int at86rf230_rx(struct at86rf230_local *lp)
{
	u8 len = 128, lqi = 0;
	struct sk_buff *skb;

	skb = alloc_skb(len, GFP_KERNEL);

	if (!skb)
		return -ENOMEM;

719
	if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
720
721
722
723
724
725
726
727
728
		goto err;

	if (len < 2)
		goto err;

	skb_trim(skb, len - 2); /* We do not put CRC into the frame */

	ieee802154_rx_irqsafe(lp->dev, skb, lqi);

729
	dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
730
731
732
733
734
735
736
737
738

	return 0;
err:
	pr_debug("received frame is too small\n");

	kfree_skb(skb);
	return -EINVAL;
}

739
740
741
742
743
744
745
746
static int
at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
			   struct ieee802154_hw_addr_filt *filt,
			   unsigned long changed)
{
	struct at86rf230_local *lp = dev->priv;

	if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
747
748
		u16 addr = le16_to_cpu(filt->short_addr);

749
750
		dev_vdbg(&lp->spi->dev,
			"at86rf230_set_hw_addr_filt called for saddr\n");
751
752
		__at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
		__at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
753
754
755
	}

	if (changed & IEEE802515_AFILT_PANID_CHANGED) {
756
757
		u16 pan = le16_to_cpu(filt->pan_id);

758
759
		dev_vdbg(&lp->spi->dev,
			"at86rf230_set_hw_addr_filt called for pan id\n");
760
761
		__at86rf230_write(lp, RG_PAN_ID_0, pan);
		__at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
762
763
764
	}

	if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
765
766
767
		u8 i, addr[8];

		memcpy(addr, &filt->ieee_addr, 8);
768
769
		dev_vdbg(&lp->spi->dev,
			"at86rf230_set_hw_addr_filt called for IEEE addr\n");
770
771
		for (i = 0; i < 8; i++)
			__at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
772
773
774
775
776
777
778
779
780
781
782
783
784
785
	}

	if (changed & IEEE802515_AFILT_PANC_CHANGED) {
		dev_vdbg(&lp->spi->dev,
			"at86rf230_set_hw_addr_filt called for panc change\n");
		if (filt->pan_coord)
			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
		else
			at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
	}

	return 0;
}

786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
static int
at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
{
	struct at86rf230_local *lp = dev->priv;

	/* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
	 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
	 * 0dB.
	 * thus, supported values for db range from -26 to 5, for 31dB of
	 * reduction to 0dB of reduction.
	 */
	if (db > 5 || db < -26)
		return -EINVAL;

	db = -(db - 5);

802
	return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
803
804
}

805
806
807
808
809
810
811
812
static int
at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
{
	struct at86rf230_local *lp = dev->priv;

	return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
}

813
814
815
816
817
818
819
820
static int
at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
{
	struct at86rf230_local *lp = dev->priv;

	return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
}

821
822
823
824
825
826
827
828
829
830
831
832
833
834
static int
at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
{
	struct at86rf230_local *lp = dev->priv;
	int desens_steps;

	if (level < lp->rssi_base_val || level > 30)
		return -EINVAL;

	desens_steps = (level - lp->rssi_base_val) * 100 / 207;

	return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
}

835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
static int
at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
			  u8 retries)
{
	struct at86rf230_local *lp = dev->priv;
	int rc;

	if (min_be > max_be || max_be > 8 || retries > 5)
		return -EINVAL;

	rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
	if (rc)
		return rc;

	rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
	if (rc)
		return rc;

853
	return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
}

static int
at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
{
	struct at86rf230_local *lp = dev->priv;
	int rc = 0;

	if (retries < -1 || retries > 15)
		return -EINVAL;

	lp->tx_aret = retries >= 0;

	if (retries >= 0)
		rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);

	return rc;
}

873
874
875
876
877
878
879
static struct ieee802154_ops at86rf230_ops = {
	.owner = THIS_MODULE,
	.xmit = at86rf230_xmit,
	.ed = at86rf230_ed,
	.set_channel = at86rf230_channel,
	.start = at86rf230_start,
	.stop = at86rf230_stop,
880
	.set_hw_addr_filt = at86rf230_set_hw_addr_filt,
881
882
};

883
884
885
886
887
888
889
890
static struct ieee802154_ops at86rf212_ops = {
	.owner = THIS_MODULE,
	.xmit = at86rf230_xmit,
	.ed = at86rf230_ed,
	.set_channel = at86rf230_channel,
	.start = at86rf230_start,
	.stop = at86rf230_stop,
	.set_hw_addr_filt = at86rf230_set_hw_addr_filt,
891
	.set_txpower = at86rf212_set_txpower,
892
	.set_lbt = at86rf212_set_lbt,
893
	.set_cca_mode = at86rf212_set_cca_mode,
894
	.set_cca_ed_level = at86rf212_set_cca_ed_level,
895
896
	.set_csma_params = at86rf212_set_csma_params,
	.set_frame_retries = at86rf212_set_frame_retries,
897
898
};

899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
static void at86rf230_irqwork(struct work_struct *work)
{
	struct at86rf230_local *lp =
		container_of(work, struct at86rf230_local, irqwork);
	u8 status = 0, val;
	int rc;
	unsigned long flags;

	rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
	status |= val;

	status &= ~IRQ_PLL_LOCK; /* ignore */
	status &= ~IRQ_RX_START; /* ignore */
	status &= ~IRQ_AMI; /* ignore */
	status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/

	if (status & IRQ_TRX_END) {
		status &= ~IRQ_TRX_END;
917
		spin_lock_irqsave(&lp->lock, flags);
918
919
		if (lp->is_tx) {
			lp->is_tx = 0;
920
			spin_unlock_irqrestore(&lp->lock, flags);
921
922
			complete(&lp->tx_complete);
		} else {
923
			spin_unlock_irqrestore(&lp->lock, flags);
924
925
926
927
			at86rf230_rx(lp);
		}
	}

928
	spin_lock_irqsave(&lp->lock, flags);
929
	lp->irq_busy = 0;
930
	spin_unlock_irqrestore(&lp->lock, flags);
931
932
933
934
935
936
937
938
}

static void at86rf230_irqwork_level(struct work_struct *work)
{
	struct at86rf230_local *lp =
		container_of(work, struct at86rf230_local, irqwork);

	at86rf230_irqwork(work);
939
940

	enable_irq(lp->spi->irq);
941
942
943
944
945
}

static irqreturn_t at86rf230_isr(int irq, void *data)
{
	struct at86rf230_local *lp = data;
946
	unsigned long flags;
947

948
	spin_lock_irqsave(&lp->lock, flags);
949
	lp->irq_busy = 1;
950
	spin_unlock_irqrestore(&lp->lock, flags);
951
952
953
954
955
956

	schedule_work(&lp->irqwork);

	return IRQ_HANDLED;
}

957
958
959
960
961
962
963
static irqreturn_t at86rf230_isr_level(int irq, void *data)
{
	disable_irq_nosync(irq);

	return at86rf230_isr(irq, data);
}

964
965
static int at86rf230_hw_init(struct at86rf230_local *lp)
{
966
	int rc, irq_pol, irq_type;
967
	u8 dvdd;
968
	u8 csma_seed[2];
969

970
971
972
	rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
	if (rc)
		return rc;
973

974
	irq_type = irq_get_trigger_type(lp->spi->irq);
975
	/* configure irq polarity, defaults to high active */
976
	if (irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
977
978
979
980
		irq_pol = IRQ_ACTIVE_LOW;
	else
		irq_pol = IRQ_ACTIVE_HIGH;

981
	rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
982
983
984
	if (rc)
		return rc;

985
	rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
986
987
988
	if (rc)
		return rc;

989
990
991
992
993
994
995
996
	get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
	if (rc)
		return rc;
	rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
	if (rc)
		return rc;

997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
	/* CLKM changes are applied immediately */
	rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
	if (rc)
		return rc;

	/* Turn CLKM Off */
	rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
	if (rc)
		return rc;
	/* Wait the next SLEEP cycle */
	msleep(100);

1009
	rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1010
1011
	if (rc)
		return rc;
1012
	if (!dvdd) {
1013
1014
1015
1016
1017
1018
1019
		dev_err(&lp->spi->dev, "DVDD error\n");
		return -EINVAL;
	}

	return 0;
}

1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
static struct at86rf230_platform_data *
at86rf230_get_pdata(struct spi_device *spi)
{
	struct at86rf230_platform_data *pdata;

	if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
		return spi->dev.platform_data;

	pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		goto done;

	pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
	pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);

	spi->dev.platform_data = pdata;
done:
	return pdata;
}

1040
static int at86rf230_probe(struct spi_device *spi)
1041
{
1042
	struct at86rf230_platform_data *pdata;
1043
1044
	struct ieee802154_dev *dev;
	struct at86rf230_local *lp;
1045
1046
	u16 man_id = 0;
	u8 part = 0, version = 0, status;
1047
1048
	irq_handler_t irq_handler;
	work_func_t irq_worker;
1049
	int rc, irq_type;
1050
	const char *chip;
1051
	struct ieee802154_ops *ops = NULL;
1052
1053
1054
1055
1056
1057

	if (!spi->irq) {
		dev_err(&spi->dev, "no IRQ specified\n");
		return -EINVAL;
	}

1058
	pdata = at86rf230_get_pdata(spi);
1059
1060
1061
1062
1063
	if (!pdata) {
		dev_err(&spi->dev, "no platform_data\n");
		return -EINVAL;
	}

1064
	if (gpio_is_valid(pdata->rstn)) {
1065
1066
		rc = devm_gpio_request_one(&spi->dev, pdata->rstn,
					   GPIOF_OUT_INIT_HIGH, "rstn");
1067
1068
1069
		if (rc)
			return rc;
	}
1070

1071
	if (gpio_is_valid(pdata->slp_tr)) {
1072
1073
		rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr,
					   GPIOF_OUT_INIT_LOW, "slp_tr");
1074
		if (rc)
1075
			return rc;
1076
1077
1078
	}

	/* Reset */
1079
1080
1081
1082
1083
1084
1085
	if (gpio_is_valid(pdata->rstn)) {
		udelay(1);
		gpio_set_value(pdata->rstn, 0);
		udelay(1);
		gpio_set_value(pdata->rstn, 1);
		usleep_range(120, 240);
	}
1086

1087
1088
	rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
	if (rc < 0)
1089
		return rc;
1090

1091
	if (man_id != 0x001f) {
1092
		dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1093
			man_id >> 8, man_id & 0xFF);
1094
		return -EINVAL;
1095
1096
	}

1097
	switch (part) {
1098
1099
	case 2:
		chip = "at86rf230";
1100
		/* FIXME: should be easy to support; */
1101
1102
1103
		break;
	case 3:
		chip = "at86rf231";
1104
1105
1106
1107
1108
1109
		ops = &at86rf230_ops;
		break;
	case 7:
		chip = "at86rf212";
		if (version == 1)
			ops = &at86rf212_ops;
1110
		break;
1111
1112
1113
1114
	case 11:
		chip = "at86rf233";
		ops = &at86rf230_ops;
		break;
1115
1116
1117
1118
1119
	default:
		chip = "UNKNOWN";
		break;
	}

1120
	dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1121
1122
	if (!ops)
		return -ENOTSUPP;
1123

1124
	dev = ieee802154_alloc_device(sizeof(*lp), ops);
1125
1126
	if (!dev)
		return -ENOMEM;
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138

	lp = dev->priv;
	lp->dev = dev;
	lp->part = part;
	lp->vers = version;

	lp->spi = spi;

	dev->parent = &spi->dev;
	dev->extra_tx_headroom = 0;
	dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;

1139
	irq_type = irq_get_trigger_type(spi->irq);
Phoebe Buckheister's avatar
Phoebe Buckheister committed
1140
1141
	if (!irq_type)
		irq_type = IRQF_TRIGGER_RISING;
1142
	if (irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
		irq_worker = at86rf230_irqwork;
		irq_handler = at86rf230_isr;
	} else {
		irq_worker = at86rf230_irqwork_level;
		irq_handler = at86rf230_isr_level;
	}

	mutex_init(&lp->bmux);
	INIT_WORK(&lp->irqwork, irq_worker);
	spin_lock_init(&lp->lock);
	init_completion(&lp->tx_complete);

	spi_set_drvdata(spi, lp);

1157
	if (is_rf212(lp)) {
1158
		dev->phy->channels_supported[0] = 0x00007FF;
1159
1160
		dev->phy->channels_supported[2] = 0x00007FF;
	} else {
1161
		dev->phy->channels_supported[0] = 0x7FFF800;
1162
	}
1163

1164
1165
	rc = at86rf230_hw_init(lp);
	if (rc)
1166
		goto err_hw_init;
1167

1168
1169
	/* Read irq status register to reset irq line */
	rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1170
	if (rc)
1171
		goto err_hw_init;
1172

Phoebe Buckheister's avatar
Phoebe Buckheister committed
1173
1174
	rc = devm_request_irq(&spi->dev, spi->irq, irq_handler,
			      IRQF_SHARED | irq_type,
1175
			      dev_name(&spi->dev), lp);
1176
	if (rc)
1177
		goto err_hw_init;
1178

1179
1180
	rc = ieee802154_register_device(lp->dev);
	if (rc)
1181
		goto err_hw_init;
1182
1183
1184

	return rc;

1185
err_hw_init:
1186
1187
1188
	flush_work(&lp->irqwork);
	mutex_destroy(&lp->bmux);
	ieee802154_free_device(lp->dev);
1189

1190
1191
1192
	return rc;
}

1193
static int at86rf230_remove(struct spi_device *spi)
1194
1195
1196
{
	struct at86rf230_local *lp = spi_get_drvdata(spi);

1197
1198
	/* mask all at86rf230 irq's */
	at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1199
1200
1201
1202
1203
	ieee802154_unregister_device(lp->dev);
	flush_work(&lp->irqwork);
	mutex_destroy(&lp->bmux);
	ieee802154_free_device(lp->dev);
	dev_dbg(&spi->dev, "unregistered at86rf230\n");
1204

1205
1206
1207
	return 0;
}

1208
static const struct of_device_id at86rf230_of_match[] = {
1209
1210
1211
1212
1213
1214
	{ .compatible = "atmel,at86rf230", },
	{ .compatible = "atmel,at86rf231", },
	{ .compatible = "atmel,at86rf233", },
	{ .compatible = "atmel,at86rf212", },
	{ },
};
1215
MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1216

1217
1218
1219
1220
1221
1222
1223
1224
1225
static const struct spi_device_id at86rf230_device_id[] = {
	{ .name = "at86rf230", },
	{ .name = "at86rf231", },
	{ .name = "at86rf233", },
	{ .name = "at86rf212", },
	{ },
};
MODULE_DEVICE_TABLE(spi, at86rf230_device_id);

1226
static struct spi_driver at86rf230_driver = {
1227
	.id_table = at86rf230_device_id,
1228
	.driver = {
1229
		.of_match_table = of_match_ptr(at86rf230_of_match),
1230
1231
1232
1233
		.name	= "at86rf230",
		.owner	= THIS_MODULE,
	},
	.probe      = at86rf230_probe,
1234
	.remove     = at86rf230_remove,
1235
1236
};

1237
module_spi_driver(at86rf230_driver);
1238
1239
1240

MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
MODULE_LICENSE("GPL v2");