cpuidle44xx.c 5.41 KB
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/*
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 * OMAP4+ CPU idle Routines
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 *
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 * Copyright (C) 2011-2013 Texas Instruments, Inc.
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 * Santosh Shilimkar <santosh.shilimkar@ti.com>
 * Rajendra Nayak <rnayak@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/sched.h>
#include <linux/cpuidle.h>
#include <linux/cpu_pm.h>
#include <linux/export.h>

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#include <asm/cpuidle.h>
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#include <asm/proc-fns.h>

#include "common.h"
#include "pm.h"
#include "prm.h"
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#include "clockdomain.h"
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/* Machine specific information */
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struct idle_statedata {
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	u32 cpu_state;
	u32 mpu_logic_state;
	u32 mpu_state;
};

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static struct idle_statedata omap4_idle_data[] = {
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	{
		.cpu_state = PWRDM_POWER_ON,
		.mpu_state = PWRDM_POWER_ON,
		.mpu_logic_state = PWRDM_POWER_RET,
	},
	{
		.cpu_state = PWRDM_POWER_OFF,
		.mpu_state = PWRDM_POWER_RET,
		.mpu_logic_state = PWRDM_POWER_RET,
	},
	{
		.cpu_state = PWRDM_POWER_OFF,
		.mpu_state = PWRDM_POWER_RET,
		.mpu_logic_state = PWRDM_POWER_OFF,
	},
};
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static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
static struct clockdomain *cpu_clkdm[NR_CPUS];
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static atomic_t abort_barrier;
static bool cpu_done[NR_CPUS];
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static struct idle_statedata *state_ptr = &omap4_idle_data[0];
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/* Private functions */

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/**
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 * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
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 * @dev: cpuidle device
 * @drv: cpuidle driver
 * @index: the index of state to be entered
 *
 * Called from the CPUidle framework to program the device to the
 * specified low power state selected by the governor.
 * Returns the amount of time spent in the low power state.
 */
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static int omap_enter_idle_simple(struct cpuidle_device *dev,
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			struct cpuidle_driver *drv,
			int index)
{
	local_fiq_disable();
	omap_do_wfi();
	local_fiq_enable();

	return index;
}

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static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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			struct cpuidle_driver *drv,
			int index)
{
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	struct idle_statedata *cx = state_ptr + index;
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	local_fiq_disable();

	/*
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	 * CPU0 has to wait and stay ON until CPU1 is OFF state.
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	 * This is necessary to honour hardware recommondation
	 * of triggeing all the possible low power modes once CPU1 is
	 * out of coherency and in OFF mode.
	 */
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	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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		while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
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			cpu_relax();
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			/*
			 * CPU1 could have already entered & exited idle
			 * without hitting off because of a wakeup
			 * or a failed attempt to hit off mode.  Check for
			 * that here, otherwise we could spin forever
			 * waiting for CPU1 off.
			 */
			if (cpu_done[1])
			    goto fail;

		}
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	}

	/*
	 * Call idle CPU PM enter notifier chain so that
	 * VFP and per CPU interrupt context is saved.
	 */
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	cpu_pm_enter();

	if (dev->cpu == 0) {
		pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
		omap_set_pwrdm_state(mpu_pd, cx->mpu_state);

		/*
		 * Call idle CPU cluster PM enter notifier chain
		 * to save GIC and wakeupgen context.
		 */
		if ((cx->mpu_state == PWRDM_POWER_RET) &&
			(cx->mpu_logic_state == PWRDM_POWER_OFF))
				cpu_cluster_pm_enter();
	}
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	omap4_enter_lowpower(dev->cpu, cx->cpu_state);
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	cpu_done[dev->cpu] = true;
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	/* Wakeup CPU1 only if it is not offlined */
	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
		clkdm_wakeup(cpu_clkdm[1]);
		clkdm_allow_idle(cpu_clkdm[1]);
	}
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	/*
	 * Call idle CPU PM exit notifier chain to restore
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	 * VFP and per CPU IRQ context.
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	 */
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	cpu_pm_exit();
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	/*
	 * Call idle CPU cluster PM exit notifier chain
	 * to restore GIC and wakeupgen context.
	 */
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	if ((cx->mpu_state == PWRDM_POWER_RET) &&
		(cx->mpu_logic_state == PWRDM_POWER_OFF))
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		cpu_cluster_pm_exit();

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fail:
	cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
	cpu_done[dev->cpu] = false;
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	local_fiq_enable();

	return index;
}

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static struct cpuidle_driver omap4_idle_driver = {
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	.name				= "omap4_idle",
	.owner				= THIS_MODULE,
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	.states = {
		{
			/* C1 - CPU0 ON + CPU1 ON + MPU ON */
			.exit_latency = 2 + 2,
			.target_residency = 5,
			.flags = CPUIDLE_FLAG_TIME_VALID,
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			.enter = omap_enter_idle_simple,
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			.name = "C1",
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			.desc = "CPUx ON, MPUSS ON"
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		},
		{
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			/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
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			.exit_latency = 328 + 440,
			.target_residency = 960,
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			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
			         CPUIDLE_FLAG_TIMER_STOP,
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			.enter = omap_enter_idle_coupled,
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			.name = "C2",
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			.desc = "CPUx OFF, MPUSS CSWR",
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		},
		{
			/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
			.exit_latency = 460 + 518,
			.target_residency = 1100,
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			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
			         CPUIDLE_FLAG_TIMER_STOP,
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			.enter = omap_enter_idle_coupled,
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			.name = "C3",
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			.desc = "CPUx OFF, MPUSS OSWR",
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		},
	},
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	.state_count = ARRAY_SIZE(omap4_idle_data),
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	.safe_state_index = 0,
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};

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/* Public functions */
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/**
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 * omap4_idle_init - Init routine for OMAP4+ idle
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 *
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 * Registers the OMAP4+ specific cpuidle driver to the cpuidle
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 * framework with the valid set of states.
 */
int __init omap4_idle_init(void)
{
	mpu_pd = pwrdm_lookup("mpu_pwrdm");
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	cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
	cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
	if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
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		return -ENODEV;

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	cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
	cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
	if (!cpu_clkdm[0] || !cpu_clkdm[1])
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		return -ENODEV;

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	return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
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}