Commit 15a2cc88 authored by Liu, Jinsong's avatar Liu, Jinsong

x86: Fix cache flush bug of cpu offline

Current xen cpu offline logic flush cache too early, which potentially
break cache coherency.  wbinvd should be the last ops before cpu going
into dead, otherwise cache may be dirty, i.e, something like setting
an A bit on page tables. Pointed out by Arjan van de Ven.
Signed-off-by: default avatarLiu, Jinsong <jinsong.liu@intel.com>
parent 1396bc5e
......@@ -561,11 +561,14 @@ static void acpi_dead_idle(void)
if ( (cx = &power->states[power->count-1]) == NULL )
goto default_halt;
/*
* cache must be flashed as the last ops before cpu going into dead,
* otherwise, cpu may dead with dirty data breaking cache coherency,
* leading to strange errors.
*/
wbinvd();
for ( ; ; )
{
if ( !power->flags.bm_check && cx->type == ACPI_STATE_C3 )
ACPI_FLUSH_CPU_CACHE();
switch ( cx->entry_method )
{
case ACPI_CSTATE_EM_FFH:
......@@ -579,6 +582,7 @@ static void acpi_dead_idle(void)
}
default_halt:
wbinvd();
for ( ; ; )
halt();
}
......
......@@ -93,6 +93,12 @@ static void default_idle(void)
static void default_dead_idle(void)
{
/*
* cache must be flashed as the last ops before cpu going into dead,
* otherwise, cpu may dead with dirty data breaking cache coherency,
* leading to strange errors.
*/
wbinvd();
for ( ; ; )
halt();
}
......@@ -100,7 +106,6 @@ static void default_dead_idle(void)
static void play_dead(void)
{
local_irq_disable();
wbinvd();
/*
* NOTE: After cpu_exit_clear, per-cpu variables are no longer accessible,
......
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