1. 09 Jan, 2019 4 commits
  2. 07 Jan, 2019 1 commit
    • Michael West's avatar
      UHD: Add wait for flush in DMA FIFO destructor · 83907678
      Michael West authored
      Prevents failure to ACK on ctrl_iface.  When running back-to-back, the
      initialization of the DMA FIFO can issue a clear while the previous
      data is still being flushed, which can cause a truncated packet that
      can end up locking up the chain and cause failure to ACK control
      packets.
      83907678
  3. 03 Jan, 2019 1 commit
    • Michael West's avatar
      TwinRX: Fix tuning · 1873e65a
      Michael West authored
      - Set SPI clock back to 3 MHz
      - Fix returned frequency for ADF5355 (rev A and B boards)
      1873e65a
  4. 21 Dec, 2018 6 commits
  5. 19 Dec, 2018 2 commits
  6. 17 Dec, 2018 26 commits